L9663 datasheet(85/106 Pages) STMICROELECTRONICS

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DS11401 Rev 6

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L9663

Communication interface

105

CRC generation is based on the same calculation scheme used for PSI5 sensor data

(generator polynomial g(x)=1+x+x3, initialization value "111") with MSB passed first.

In case the IC receives a not valid register address on MOSI, the address bit are recognized

as invalid address; in this case the two last bit on MISO (i.e. CRC[1:0]) are intentionally

corrupted, inverting their values (NOT operator).

The same action is also performed either in case of access to a not valid register (address >

59) or in case of:



slot error when PSI5 data SPI frame.



write access to read only registers.



Frame L-H wrong sequence.

Figure 27. Operation on internal register (with upstream data buffer)

Figure 28. Init data reading

Sensor data Reading:

Timeslot coding: Timeslot1=001, …, timeslot6=110

SID and Gbit are supported only for 10 - 16 bit and enabled by 1 single configuration bit =

GCR1(2)

Two kinds of transfer are possible:

No SID, payload ≤ 20 bit; SID and GBIT, payload ≤ 16 bit: one transfer needed

No SID, payload > 20 bit: two transfers are needed.

In case 1) the L/H bit must be L (0).

In case 2) the device expects a sequence H - L on the L/H bit to transmit first the MSB part

of the data and then the LSB.

To guarantee a safe communication with two SPI transfers:



if CRC is the one from the sensor (GCR1(1)=0) , CRC is the same on both transfers

and it's the one from the sensor;



if CRC is calculated on SPI (GCR1(1)=1), CRC is calculated over bits 26:3 in each

frame.

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