L9663 datasheet(18/106 Pages) STMICROELECTRONICS

18 / 106 page

Power supply

L9663

18/106

DS11401 Rev 6

A ceramic capacitor with a typical capacitance of 100 nF is required as a blocking capacitor

close to the pins VDD and VB.

The internal supply voltages VINTD (supply voltage for digital part) and VINTA (supply voltage

for analog part) are monitored for under voltage and over voltage to prevent the transceiver

IC from malfunction. The reference for the voltage monitoring is a bandgap voltage, supplied

by VINTA. The device integrates two separated instances of bandgap voltage regulators; one

of these bandgaps is used as voltage reference for the internal regulators, while the other

one is used for monitoring the voltage levels. In case of under or over voltage, the

transceiver IC is set into reset: outside reset thresholds full functionality is granted.

The functionality of the digital part only depends on the voltages on VINTD. In order to

improve noise emissions and stability of the regulator, the digital supply line needs an

external decoupling 100 nF ceramic capacitor to be connected between VINTD and DGND

and close to them.

DGND ground line is protected against ground loss scenarios. In case DGND line would be

at least DGNDOPEN above the reference ground lines GND1/2, a POR is asserted.

The transceiver IC returns to normal operation with full functionality as soon as the POR is

released.

2.2

VAS supply and pre-regulator

The VAS pre-regulator sets the VAS voltage if no regulated voltage with the necessary value

is available in the ECU.

The pre-regulator is designed for two different regulated voltages at VAS: 5.3 V or 7.6 V,

selectable by a SPI command. The supply of external FET can be chosen at application

level according to the required voltage at VAS pin.

Two possible applications are:



VAS typical of 5.3 V; external FET supplied by ECU internal voltage, typically 6 V .



VAS typical of 7.6 V; external FET directly supplied from battery, from 8 V to 35 V.

Basic features:



Gate control for an external n-ch FET transistor with integrated charge pump stage



Gate control is switched on if no power on reset condition is present



Configurable output voltage: either 5.3 V or 7.6 V.

L9663 数据表(PDF) 18 Page - STMicroelectronics

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