L9924L datasheet(21/84 Pages) STMICROELECTRONICS

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L9924L

Electrical specifications

Pins involved in both LIN and BSS protocols management are:



LIN_RX_SP: smart power output, which stands for RxD



LIN_TX_SP: smart power input, which stands for TxD



LIN/BSS: transceiver bus from ECU



LIN_RX: µC input to be connected to LIN_RX_SP



LIN_TX: µC output to be connected to LIN_TX_SP

LIN Error Handling

The device provides the following 3 error handling features which aren't described in the LIN

Spec. V2.1, but implemented in several stand-alone LIN transceivers/microcontrollers to

switch the application back to normal operation mode.



Dominant TxD time out

In case TxD is in dominant state (i.e. low level) for more than tdom(TXD)=12ms (typical

value) the transmitter will be disabled. The status won't be latched and can be read

through bit 12 (read only) of 0x12 SPI register. The transmitter remains disabled until

TxD changes to recessive state (i.e. high level) for more than 12µs. This error detection

can be enabled by setting bit 1 of 0x08 SPI register.



Permanent recessive LIN/BSS bus

In case TxD changes to dominant (i.e. low level) state and RxD signal does not follow

within trec(LIN) = 40 µs (typical value) the transmitter will be disabled. The status bit

won't be latched and can be read through bit 11 (read only) of 0x12 SPI register. The

transmitter remains disabled until TxD changes to recessive state (i.e. high level) for

more than 12 µs.



Permanent dominant LIN/BSS bus

In case the bus state is dominant (i.e. LIN/BSS at low level) for more than

tdom(LIN) = 12 ms (typical value) a permanent dominant status will be detected. The

status won't be latched and can be read through bit 13 (read only) of 0x12 SPI register.

The transmitter will not be switched off. This error detection can be enabled by setting

bit 1 of 0x08 SPI register.

Note:

a normal wake up caused by a message on the bus will start the voltage regulator and the

microcontroller to switch the application back to normal operation mode.

Wake-up by LIN/BSS bus

In power standby mode the device can receive a wake-up from LIN/BSS bus. Two different

conditions can be differentiated:



Normal wake-up

A normal wake-up occurs when the device was previously asked to enter Power Stand-

by mode while LIN/BSS bus was in recessive (i.e. high level) state. A level at LIN bus

crossing VThwkup longer than tlinbus = 5 µs (typical value) will switch the device into

Active mode and will turn the LIN/BSS receiver on as well to process coming message

frames. An event is generated at the RxD pin.



Wake-up from LIN/BSS bus in short-to-GND condition

This wake-up condition isn't supported by the device and must be carefully avoided into

application. In case the device was asked to enter Power Stand-by mode while

LIN/BSS bus was recognized in dominant (i.e. low level) state, the command must be

preceded by the LIN/BSS wake-up disable command (bit 12 in 0x04 SPI register).

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