数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

INA745AIRELR 数据表(PDF) 7 Page - Texas Instruments

部件名 INA745AIRELR
功能描述  INA745x 40V, 16-Bit, Precision I2C Output Digital Power Monitor With EZShunt™ Technology
PDF  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

INA745AIRELR 数据表(HTML) 7 Page - Texas Instruments

Back Button INA745AIRELR Datasheet HTML 3Page - Texas Instruments INA745AIRELR Datasheet HTML 4Page - Texas Instruments INA745AIRELR Datasheet HTML 5Page - Texas Instruments INA745AIRELR Datasheet HTML 6Page - Texas Instruments INA745AIRELR Datasheet HTML 7Page - Texas Instruments INA745AIRELR Datasheet HTML 8Page - Texas Instruments INA745AIRELR Datasheet HTML 9Page - Texas Instruments INA745AIRELR Datasheet HTML 10Page - Texas Instruments INA745AIRELR Datasheet HTML 11Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 50 page
background image
5.6 Timing Requirements (I2C)
MIN
NOM
MAX
UNIT
I2C BUS (FAST MODE)
F(SCL)
I2C clock frequency
1
400
kHz
t(BUF)
Bus free time between STOP and START conditions
600
ns
t(HDSTA)
Hold time after a repeated START condition. After this period, the first
clock is generated.
100
ns
t(SUSTA)
Repeated START condition setup time
100
ns
t(SUSTO)
STOP condition setup time
100
ns
t(HDDAT)
Data hold time
10
900
ns
t(SUDAT)
Data setup time
100
ns
t(LOW)
SCL clock low period
1300
ns
t(HIGH)
SCL clock high period
600
ns
tF
Data fall time
300
ns
tF
Clock fall time
300
ns
tR
Clock rise time
300
ns
I2C BUS (HIGH-SPEED MODE)
F(SCL)
I2C clock frequency
10
2940
kHz
t(BUF)
Bus free time between STOP and START conditions
160
ns
t(HDSTA)
Hold time after a repeated START condition. After this period, the first
clock is generated.
100
ns
t(SUSTA)
Repeated START condition setup time
100
ns
t(SUSTO)
STOP condition setup time
100
ns
t(HDDAT)
Data hold time
10
125
ns
t(SUDAT)
Data setup time
20
ns
t(LOW)
SCL clock low period
200
ns
t(HIGH)
SCL clock high period
60
ns
tF
Data fall time
80
ns
tF
Clock fall time
40
ns
tR
Clock rise time
40
ns
5.7 Timing Diagram
SCL
SDA
t
(LOW)
t
R
t
F
t
(HDSTA)
t
(HDSTA)
t
(HDDAT)
t
(SUDAT)
t
(HIGH)
t
(SUSTA)
t
(SUSTO)
t
(BUF)
S
S
P
P
Figure 5-1. I2C Timing Diagram
www.ti.com
INA745A, INA745B
SBOSAC3B – JULY 2023 – REVISED AUGUST 2025
Copyright © 2025 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: INA745A INA745B



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com