5.15 Switching Characteristics—5V Supply

VCC1 = VCC2 = 5V ±10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

See Figure 6-1

6

11

16

ns

PWD

Pulse width distortion(1) |tPHL – tPLH|

0.55

4.1

ns

tsk(o)

Channel-to-channel output skew time(2)

Same-direction channels

2.5

ns

tsk(pp)

Part-to-part skew time(3)

4.5

ns

tr

Output signal rise time

See Figure 6-1

1.7

3.9

ns

tf

Output signal fall time

1.9

3.9

ns

tPHZ

Disable propagation delay, high-to-high impedance

output

See Figure 6-2

12

20

ns

tPLZ

Disable propagation delay, low-to-high impedance

output

12

20

ns

tPZH

Enable propagation delay, high impedance-to-high

output for ISO7842

10

20

ns

Enable propagation delay, high impedance-to-high

output for ISO7842F

2

2.5

μs

tPZL

Enable propagation delay, high impedance-to-low

output for ISO7842

2

2.5

μs

Enable propagation delay, high impedance-to-low

output for ISO7842F

10

20

ns

tfs

Default output delay time from input power loss

Measured from the time VCC goes below 1.7V. See

Figure 6-3

0.2

9

μs

tie

Time interval error

216 – 1 PRBS data at 100Mbps

0.90

ns

(1)

Also known as pulse skew.

(2)

tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

www.ti.com

ISO7842, ISO7842F

SLLSEJ0I – OCTOBER 2014 – REVISED JULY 2025

Copyright © 2025 Texas Instruments Incorporated

Submit Document Feedback

11

Product Folder Links: ISO7842 ISO7842F