IS25LE01G-RILA3 datasheet(36/186 Pages) ISSI

36 / 186 page

IS25LE01G

IS25WE01G

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A6

01/14/2025

TBPARM bit: TBPARM defines the logical location of the parameter block. The parameter block consists of thirty-

two 4KB sectors, which replace two 64KB blocks. When TBPARM is set to a

“0” the parameter block is in the top

of the memory array address space. When TBPARM is set to a

“1” the parameter block is at the Bottom of the

array. TBPARM is OTP and set to a

“1” when it ships from Factory. If TBPARM is programmed to “0”, an attempt

to change it back to

“1” will fail and ignore the Program.

The desired state of TBPARM must be selected during the initial configuration of the device during system

manufacture; before the first program or erase operation on the main flash array. TBPARM must not be

programmed after programming or erasing is done in the main flash array.

TBS can be programmed independent of TBPARM. Therefore, the user can select to store parameter information

from the bottom of the array and protect boot code starting at the top of the array, and vice versa. Or the user can

select to store and protect the parameter information starting from the top or bottom together.

Note: For optional device with block size of 256KB, there is no parameter blocks, so TBPARM bit is reserved.

6.6.2 PASSWORD REGISTER

Related Commands: Read Password (RDPWD E7h), Program Password (PGPWD E8h), and Unlock Password

(UNPWD, E9h).

Table 6.20 Password Register Bit Definition

Bit

Name

Definition

Default

Read-

/Write

Type

63:0

PSWD

64 bit hidden password:

The password is no longer readable after the password

protection mode is selected by programming ASPR bit 2

to zero.

FFFFFFFF-

FFFFFFFFh

R/W

OTP

6.6.3 PPB LOCK REGISTER

Related Commands: Read PPB Lock Bit (RDPLB A7h), Write PPB Lock Bit (WRPLB A6h), and Set FREEZE Bit

(SFRZ 91h).

Table 6.21 PPB Lock Register Bit Definition

Bit

Name

Definition

Default

Read-

/Write

Type

PPBLK

PPB Lock bit: Protect PPB Array

“0” = PPB array protected until next power cycle

or Hardware Reset

“1” = PPB array may be programmed or erased.

Persistent: 1

Password: 0

R/W

Volatile

6:1

Reserved

FREEZE

Lock current state of BP3-0 bits in Status Register, TBS in

Function Register and TBPARM in ASPR, and

Information Row (IR) regions.

“1” = Locked

“0” = Un-locked

R/W

Volatile

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