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IS25LE01G-RILA3 数据表(PDF) 70 Page - Integrated Silicon Solution, Inc

部件名 IS25LE01G-RILA3
功能描述  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3 数据表(HTML) 70 Page - Integrated Silicon Solution, Inc

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IS25LE01G
IS25WE01G
Integrated Silicon Solution, Inc.- www.issi.com
70
Rev. A6
01/14/2025
Figure 8.9 Fast Read Dual I/O AX Read Sequence (BBh [EXTADD=0], 3-byte address)
22
CE #
SCK
2
0
3-byte Address
20
18
...
0
1
2
3
...
11
12
13
14
15
16
17
18
19
20
21
Mode 3
Mode 0
23
3
1
21
19
...
IO0
IO1
4 Dummy Cycles
6
7
6
4
7
5
2
0
3
1
Data Out 1
tV
6
4
7
5
2
0
3
1
4
5
Mode Bits
...
...
Data Out 2
...
Notes:
1. If the mode bits
=AXh (where X is don’t care), it will keep executing the AX read mode (without command). When the
mode bits are different from AXh, the device exits the AX read operation.
2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.11 Read Dummy Cycles.
3. Sufficient dummy cycles are required to avoid I/O contention. If the number of dummy cycles and AX bits cycles
are same, then X should be Hi-Z.
Figure 8.10 Fast Read Dual I/O AX Read Sequence (BBh [EXTADD=1] or BCh, 4-byte address)
30
CE #
SCK
2
0
4-byte Address
28
26
...
0
1
2
3
...
15
16
17
18
19
20
21
22
23
24
25
Mode 3
Mode 0
31
3
1
29
27
...
IO0
IO1
4 Dummy Cycles
6
7
6
4
7
5
2
0
3
1
Data Out 1
tV
6
4
7
5
2
0
3
1
4
5
Mode Bits
...
...
Data Out 2
...
Notes:
1.
If the mode bits=AXh (where X is don’t care), it will keep executing the AX read mode (without command). When the
mode bits are different from AXh, the device exits the AX read operation.
2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.11 Read Dummy Cycles.
3. Sufficient dummy cycles are required to avoid I/O contention. If the number of dummy cycles and AX bits cycles
are same, then X should be Hi-Z.



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