TLV2172IDRG4 datasheet(21/49 Pages) TI2

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100

1000

0.01

0.1

100

1000

LOAD (nF)

60°Phase Margin

45°Phase Margin

C041

AOL

100

10k

100k

100

120

10M

100M

Frequency (Hz)

20 dB

ROC

dec

40 dB

1 dec

ISO

LOAD

ISO

LOAD

TLV172, TLV2172, TLV4172

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SBOS784C – NOVEMBER 2016 – REVISED JANUARY 2019

Product Folder Links: TLV172 TLV2172 TLV4172

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Typical Application (continued)

Figure 30. Unity-Gain Amplifier With RISO Compensation

Typically, ROC stability analysis is simulated. The validity of the analysis depends on multiple factors, especially

the accurate modeling of Ro. In addition to simulating the ROC, a robust stability analysis includes a

measurement of overshoot percentage and AC gain peaking of the circuit using a function generator,

oscilloscope, and gain and phase analyzer. Phase margin is then calculated from these measurements. Table 3

shows the overshoot percentage and AC gain peaking that correspond to phase margins of 45° and 60°. For

more details on this design and other alternative devices that can replace the TLVx172, see the Capacitive Load

Drive Solution Using an Isolation Resistor precision design.

Table 3. Phase Margin versus Overshoot and AC Gain

Peaking

PHASE

MARGIN

OVERSHOOT

AC GAIN PEAKING

45°

23.3%

2.35 dB

60°

8.8%

0.28 dB

9.2.3 Application Curve

The values of RISO that yield phase margins of 45º and 60º for various capacitive loads are determined using the

described methodology. Figure 31 shows the results.

Figure 31. Isolation Resistor Required for Various Capacitive Loads to Achieve a Target Phase Margin

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