| 数据搜索系统,热门电子元器件搜索 |
|
TPS2061DBVRG4 数据表(PDF) 47 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TPS2061DBVRG4 数据表(HTML) 47 Page - Texas Instruments |
|
47 / 55 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP (2) NOTE 10 (3) NOTE 10 (1.22) (0.55) ( 0.2) TYP VIA (1.65) (1.84) PowerPAD VSSOP - 1.1 mm max height DGN0008K SMALL OUTLINE PACKAGE 4231889/A 05/2025 NOTES: (continued) 7. Publication IPC-7351 may have alternate designs. 8. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 9. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 10. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM 1 4 5 8 SOLDER MASK DEFINED PAD METAL COVERED BY SOLDER MASK SEE DETAILS 9 15.000 METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |