TPS7A0233DBVR datasheet(3/48 Pages) TI2

3 / 48 page

5 Pin Configuration and Functions

OUT

GND

Thermal Pad

Not to scale

Figure 5-1. DQN Package, 1-mm × 1-mm, 4-Pin

X2SON (Top View)

GND

OUT

Not to scale

Figure 5-2. DBV Package, 5-Pin SOT-23 (Top View)

Table 5-1. Pin Functions: DQN, DBV

I/O(1)

DESCRIPTION

NAME

DQN

DBV

Input

Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low

or floating this pin disables the device. This pin features an internal pulldown resistor,

which is disconnected when EN is driven high externally and the device has started up.

GND

—

Ground pin. This pin must be connected to ground on the board.

Input

Input pin. For best transient response and to minimize input impedance, use

the recommended value or larger ceramic capacitor from IN to ground; see the

Recommended Operating Conditions table. Place the input capacitor as close to the

input of the device as possible.

—

No connect pin. This pin is not internally connected. Connect to ground or leave floating.

OUT

Output

Regulated output pin. A 0.5-µF or greater effective capacitance is required from OUT to

ground for stability. For best transient response, use a 1-µF or larger ceramic capacitor

from OUT to ground. Place the output capacitor as close to output of the device as

possible; see the Recommended Operating Conditions table.

Thermal pad

––

—

Connect the thermal pad to a large-area ground plane. The thermal pad is internally

connect to ground.

(1)

NC = No internal connection.

www.ti.com

TPS7A02

SBVS277C – JULY 2019 – REVISED SEPTEMBER 2022

Submit Document Feedback

Product Folder Links: TPS7A02

TPS7A0233DBVR 数据表(PDF) 3 Page - Texas Instruments

TPS7A0233DBVR 数据表(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

数据表下载