6 Mode 2 parallel interface

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15

Symbol

Parameter

Min

Nom

Max

Units

Notes

TRSVCSL

Register select setup

5

ns

TCSLRSX

Register select hold

8

ns

TRWVCSL

Read/write strobe setup

5

ns

TCSLRWX

Read/write strobe hold

8

ns

TCSLCSH

Chip select active

60

ns

TCSHCSL

Delay before re-assertion of chip select

50

ns

Table 6.2

IMS C011 Mode 2 parallel interface control

Symbol

Parameter

Min

Nom

Max

Units

Notes

TLdVIIH

Start of link data to InputInt high

14

bits

1

TCSLIIL

Chip select to InputInt low

35

ns

TCSLDrX

Chip select to bus active

5

ns

TCSLDrV

Chip select to data valid

50

ns

TCSHDrZ

Chip select high to bus tristate

38

ns

TCSHDrX

Data hold after chip select high

5

ns

TCSHLaV

Chip de-select to start of Ack

0.8

2.5

bits

1,2

Notes

1 Unit of measurement is one link data bit time; at 10 Mbits/s data link speed, one bit time is nomi-

nally 100 ns.

2 Maximum time assumes there is no data packet already on the link. Maximum time with data on

the link is extended by 11 bits.

Table 6.3

IMS C011 Mode 2 parallel interface read

Ack

Data

Data

TLdVIIH

TCSLIIL

TRSVCSL

TCSLRSX

TRWVCSL

TCSLRSX

TCSHDrZ

TCSHDrX

TCSLDrX

TCSLDrV

TCSHLaV

LinkIn

InputInt

RS0–1

RnotW

notCS

D0–7

LinkOut

TCSLCSH

TCSHCSL

Figure 6.1

IMS C011 Mode 2 read parallel data from link adaptor