TLV9032DDFR.A datasheet(24/85 Pages) TI2

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7 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and

TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

7.1 Application Information

7.1.1 Basic Comparator Definitions

7.1.1.1 Operation

The basic comparator compares the input voltage (VIN) on one input to a reference voltage (VREF) on the other

input. In the Comparator Timing Diagram example below, if VIN is less than VREF, the output voltage (VO) is

logic low (VOL). If VIN is greater than VREF, the output voltage (VO) is at logic high (VOH). Output Conditions

summarizes the output conditions. The output logic can be inverted by simply swapping the input pins.

Table 7-1. Output Conditions

Inputs Condition

Output

IN+ > IN-

HIGH (VOH)

IN+ = IN-

Indeterminate (chatters - see Hysteresis)

IN+ < IN-

LOW (VOL)

7.1.1.2 Propagation Delay

There is a delay between from when the input crosses the reference voltage and the output responds. This

is called the Propagation Delay. Propagation delay can be different between high-to low and low-to-high input

transitions. This is shown as tpLH and tpHL in Figure 7-1 and is measured from the mid-point of the input to the

midpoint of the output.

20%

80%

20%

80%

VREF

VREF + 100mV

VREF

100mV

50%

tpLH

tpHL

Input

Output

–

VREF

VIN

Output

VOL

VOH

V+

GND

VOD (+200mV)

VIN

VREF + 200mV

VREF - 200mV

VOD (-200mV)

Figure 7-1. Comparator Timing Diagram

TLV9020, TLV9021, TLV9022, TLV9024, TLV9030, TLV9031, TLV9032, TLV9034

SNOSDA3H – JUNE 2020 – REVISED NOVEMBER 2025

www.ti.com

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