6.42

7133SA/LA, 7143SA/LA

High-Speed 2K x 16 Dual-Port RAM

Military, Industrial and Commercial Temperature Ranges

7

Jun.16.21

2746 drw 06

DATAOUT

775

Ω

1250

Ω

30pF

5V

DATAOUT

775

Ω

1250

Ω

5pF*

5V

BUSY

270

Ω

30pF

5V

Data Retention Waveform

AC Test Conditions

Data Retention Characteristics

(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V

NOTES:

1. Vcc = 2V, TA = +25°C, and are not production tested.

2. tRC = Read Cycle Time

3. This parameter is guaranteed by device characterization but is not production tested.

Figure 2. Output Load

(for tLZ, tHZ, tWZ, tOW)

*Including scope and jig

Figure 1. AC Output Test Load

Figure 3. BUSY Output Load

(IDT7133 only)

7133LA/7143LA

Symbol

Parameter

Test Condition

Min.

Typ.(1)

Max.

Unit

VDR

VCC for Data Retention

VCC = 2V

2.0

___

___

V

ICCDR

Data Retention Current

CE > VHC

VIN > VHC or < VLC

MIL. & IND.

___

100

4000

µA

COM'L.

___

100

1500

tCDR(3)

Chip Deselect to Data Retention Time

0

___

___

V

tR(3)

Operation Recovery Time

tRC(2)

___

___

V

2746 tbl 08

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

GND to 3.0V

5ns Max.

1.5V

1.5V

Figures 1, 2 and 3

2746 tbl 09

2746 drw 05

tCDR

tR

CE

VCC

DATA RETENTION MODE

VDR

VDR > 2V

4.5V

4.5V

VIH

VIH