6.42

7133SA/LA, 7143SA/LA

High-Speed 2K x 16 Dual-Port RAM

Military, Industrial and Commercial Temperature Ranges

2

Jun.16.21

2746 drw 02

10

11

12

13

14

15

16

50

49

48

47

46

45

44

17

18

19

20

21

22

23

24

25

26

51 52 53 54 55 56 57 58 59 60

9

8

7

6

5

4

3

2

1

68

67

66

65

64

63

62

61

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

I/O1L

I/O2L

I/O3L

I/O4L

I/O5L

I/O6L

I/O7L

I/O8L

VCC(1)

A10L

A9L

A8L

A7L

R/

WLLB

OEL

I/O9R

I/O10R

I/O12R

I/O13R

I/O14R

I/O15R

A6R

A7R

A8R

A9R

I/O8R

A10R

GND(2)

OER

R/

WRLB

R/

WRUB

I/O11R

I/O0L

R/

WLUB

7133/43

PLG68(4)

68-Pin PLCC

Top View

Pin Configurations(1,2,3,4)

Description

The IDT7133/7143 are high-speed 2K x 16 Dual-Port Static RAMs.

The IDT7133 is designed to be used as a stand-alone 16-bit Dual-Port

RAM or as a “MASTER” Dual-Port RAM together with the IDT7143

“SLAVE”Dual-Portin32-bit-or-morewordwidthsystems.UsingtheIDT

MASTER/SLAVE Dual-Port RAM approach in 32-bit-or-wider memory

systemapplicationsresultsinfull-speed,error-freeoperationwithoutthe

needforadditionaldiscretelogic.

Both devices provide two independent ports with separate control,

address,andI/Opinsthatpermitindependent, asynchronousaccessfor

reads or writes to any location in memory. An automatic power down

feature,controlledby CE,permitstheon-chipcircuitryofeachporttoenter

a very low standby power mode.

Fabricated using CMOS high-performance technology. Low-power

(LA)versionsofferbatterybackupdataretentioncapability,witheachport

typicallyconsuming200µWfora2Vbattery.

TheIDT7133/7143deviceshaveidenticalpinouts.Eachispackedin

a68-pinceramicPGA,68-pinflatpack,68-pinPLCCand100-pinTQFP.

Militarygradeproductismanufacturedincompliancewiththelatestrevision

ofMIL-PRF-38535QML,makingitideallysuitedtomilitarytemperature

applicationsdemandingthehighestlevelofperformanceandreliability.

2746 drw 02c

10 11 12 13 14 15 16

7133/43

FP68(4)

68-Pin Flatpack

Top View

50 49 48 47 46 45 44

17 18 19 20 21 22 23 24 25 26

51

52

53

54

55

56

57

58

59

60

9

8

7

6

5

4

3

2

1

68

67

66

65

64

63

62

61

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

I/O1L

I/O2L

I/O3L

I/O4L

I/O5L

I/O6L

I/O7L

I/O8L

VCC(1)

A10L

A9L

A8L

A7L

R/

WLLB

OEL

I/O9R

I/O10R

I/O12R

I/O13R

I/O14R

I/O15R

A6R

A7R

A8R

A9R

I/O8R

A10R

GND(2)

OER

R/

WRLB

R/

WRUB

I/O11R

I/O0L

R/

WLUB

NOTES:

1. Both VCC pins must be connected to the power supply to ensure reliable

operation.

2. Both GND pins must be connected to the ground supply to ensure reliable

operation.

3. PLG68 package body is approximately 0.95 in x 0.95 in x 0.17 in.

FP68 package body is approximately 1.18 in x 1.18 in x 0.16 in.

4. This package code is used to reference the package diagram.