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M28C64 数据表(PDF) 13 Page - STMicroelectronics |
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M28C64 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 24 page  13/24 M28C64 Table 10B. Write Mode AC Characteristics for M28C64 (5V range) (TA = –40 to 125 °C; VCC = 4.5 to 5.5 V) Symbol Alt. Parameter Test Condit ion M28C64 Unit Min Max tAVWL tAS Address Valid to Write Enable Low E= VIL,G = VIH 0ns tAVEL tAS Address Valid to Chip Enable Low G= VIH,W = VIL 0ns tELWL tCES Chip Enable Low to Write Enable Low G= VIH 0ns tGHWL tOES Output Enable High to Write Enable Low E= VIL 0ns tGHEL tOES Output Enable High to Chip Enable Low W= VIL 0ns tWLEL tWES Write Enable Low to Chip Enable Low G = VIH 0ns tWLAX tAH Write Enable Low to Address Transition 75 ns tELAX tAH Chip Enable Low to Address Transition 75 ns tWLDV tDV Write Enable Low to Input Valid E= VIL,G = VIH 1 µs tELDV tDV Chip Enable Low to Input Valid G= VIH,W = VIL 1 µs tELEH tWP Chip Enable Low to Chip Enable High 50 ns tWHEH tCEH Write Enable High to Chip Enable High 0 ns tWHGL tOEH Write Enable High to Output Enable Low 0 ns tEHGL tOEH Chip Enable High to Output Enable Low 0 ns tEHWH tWEH Chip Enable High to Write Enable High 0 ns tWHDX tDH Write Enable High to Input Transition 0 ns tEHDX tDH Chip Enable High to Input Transition 0 ns tWHWL tWPH Write Enable High to Write Enable Low 50 1000 ns tWLWH tWP Write Enable Low to Write Enable High 50 ns tWLQ5H tBLC Time-out after last byte write (M28C64) 100 µs Time-out after last byte write (M28C64-A) 20 µs tQ5HQ5X tWC Write Cycle Time (M28C64) 3 ms Write Cycle Time (M28C64-A) 1 ms tWHRL tDB Write Enable High to Ready/Busy Low Note 1 150 ns tEHRL tDB Chip Enable High to Ready/Busy Low Note 1 150 ns tDVWH tDS Data Valid before Write Enable High 50 ns tDVEH tDS Data Valid before Chip Enable High 50 ns |
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