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M29F040 数据表(PDF) 14 Page - STMicroelectronics |
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M29F040 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 31 page ![]() Symbol Alt Parameter M29F040 Unit -70 -90 VCC = 5V ± 10% VCC = 5V ± 10% Standard Interface Standard Interface Min Max Min Max tAVAV tWC Address Valid to Next Address Valid 70 90 ns tELWL tCS Chip Enable Low to Write Enable Low 0 0 ns tWLWH tWP Write Enable Low to Write Enable High 35 45 ns tDVWH tDS Input Valid to Write Enable High 30 45 ns tWHDX tDH Write Enable High to Input Transition 0 0 ns tWHEH tCH Write Enable High to Chip Enable High 0 0 ns tWHWL tWPH Write Enable High to Write Enable Low 20 20 ns tAVWL tAS Address Valid to Write Enable Low 0 0 ns tWLAX tAH Write Enable Low to Address Transition 45 45 ns tGHWL Output Enable High to Write Enable Low 0 0 ns tVCHEL tVCS VCC High to Chip Enable Low 50 50 µs tWHQV1 (1) Write Enable High to Output Valid (Program) 10 10 µs tWHQV2 (1) Write Enable High to Output Valid (Block Erase) 1.0 30 1.0 30 sec tWHGL tOEH Write Enable High to Output Enable Low 0 0 ns Note: 1. Time is measured to Data Polling or Toggle Bit, tWHQV = tWHQ7V + tQ7VQV 2. The temperature range –40 to 125 °C is guaranteed at 70ns with High Speed Interface test condition and VCC = 5V ± 5%. Table 13A. Write AC Characteristics, Write Enable Controlled (TA = 0 to 70 °C, –20 to 85°C, –40 to 85°C or –40 to 125°C)(2) Erase Resume (ER) instruction. If an Erase Sus- pend instruction was previously executed, the erase operation may be resumed by giving the command 30h, at any address, and without any coded cycles. Power Up The memory Command Interface is reset on power up to Read Array. Either E or W must be tied to VIH during Power-up to allow maximum security and the possibility to write a command on the first rising adge of E or W. Any write cycle initiation is blocked when VCC is below VLKO. Supply Rails Normal precautions must be taken for supply volt- age decoupling, each device in a system should have the VCC rail decoupled with a 1.0 µF capacitor close to the VCC and VSS pins. The PCB trace widths should be sufficient to carry the VCC pro- gram and erase currents required. 14/31 M29F040 |
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