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M29F040 数据表(PDF) 2 Page - STMicroelectronics |
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M29F040 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 31 page  A1 A0 DQ0 A7 A4 A3 A2 A6 A5 A13 A10 A8 A9 DQ7 A14 A11 G E DQ5 DQ1 DQ2 DQ3 DQ4 DQ6 A17 W A16 A12 A18 VCC A15 AI01379 M29F040 (Normal) 8 1 9 16 17 24 25 32 VSS Figure 2B. TSOP Pin Connections AI01378 A13 A10 17 A1 A0 DQ0 A7 A4 A3 A2 A6 A5 9 A8 1 A9 DQ7 A14 32 M29F040 A11 G E 25 Figure 2A. LCC Pin Connections A1 A0 DQ0 A7 A4 A3 A2 A6 A5 A13 A10 A8 A9 DQ7 A14 A11 G E DQ5 DQ1 DQ2 DQ3 DQ4 DQ6 A17 W A16 A12 A18 VCC A15 AI01174B M29F040 (Reverse) 8 1 9 16 17 24 25 32 VSS Figure 2C. TSOP Reverse Pin Connections DESCRIPTION The M29F040 is a non-volatile memory that may be erased electrically at the block level, and pro- grammed Byte-by-Byte. The interface is directly compatible with most mi- croprocessors. PLCC32 and TSOP32 (8 x 20mm) packages are available. Both normal and reverse pin outs are available for the TSOP32 package. Organisation The Flash Memory organisation is 512K x8 bits with Address lines A0-A18 and Data Inputs/Outputs DQ0-DQ7. Memory control is provided by Chip Enable, Output Enable and Write Enable Inputs. Erase and Program are performed through the internal Program/Erase Controller (P/E.C.). Data Outputs bits DQ7 and DQ6 provide polling or toggle signals during Automatic Program or Erase to indicate the Ready/Busy state of the internal Program/Erase Controller. Memory Blocks Erasure of the memory is in blocks. There are 8 uniform blocks of 64 Kbytes each in the memory address space. Each block can be programmed and erased over 100,000 cycles. Each uniform block may separately be protected and unpro- 2/31 M29F040 |
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