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M48T59, M48T59Y, M48T59V

DESCRIPTION

8Kb x8 non-volatile static RAM and real time clock.

The monolithic chip is available in two special

packages to provide a highly integrated battery

backed-up memory and real time clock solution.

The M48T59/59Y/59V is a non-volatile pin and

function equivalent to any JEDEC standard 8Kb x8

SRAM. It also easily fits into many ROM, EPROM,

and EEPROM sockets, providing the non-volatility

of PROMs without any requirement for special

write timing or limitations on the number of writes

that can be performed.

The 28 pin 600mil DIP CAPHAT™ houses the

M48T59/59Y/59V silicon with a quartz crystal and

a long life lithium button cell in a single package.

The 28 pin 330mil SOIC provides sockets with

gold plated contacts at both ends for direct con-

nection to a separate SNAPHAT housing contain-

ing the battery and crystal. The unique design

allows the SNAPHAT battery package to be

mounted on top of the SOIC package after the

completion of the surface mount process. Inser-

tion of the SNAPHAT housing after reflow pre-

vents potential battery and crystal damage due to

the high temperatures required for device surface-

mounting. The SNAPHAT housing is keyed to pre-

vent reverse insertion.

Table 4. AC Measurement Conditions

Note that Output Hi-Z is defined as the point where data is no longer

driven.

Input Rise and Fall Times

≤ 5ns

Input Pulse Voltages

0 to 3V

Input and Output Timing Ref. Voltages

1.5V

Figure 3. Block Diagram

AI01383D

LITHIUM

CELL

OSCILLATOR AND

CLOCK CHAIN

VPFD

RST

VCC

VSS

32,768 Hz

CRYSTAL

VOLTAGE SENSE

AND

SWITCHING

CIRCUITRY

16 x 8 BiPORT

SRAM ARRAY

8176 x 8

SRAM ARRAY

A0-A12

DQ0-DQ7

E

W

G

POWER

IRQ/FT

Figure 4. AC Testing Load Circuit

Note: Excluding open-drain output pins.

AI02325

CL = 100pF

CL includes JIG capacitance

645

Ω

DEVICE

UNDER

TEST

1.75V