Figure 7-7 shows the setup that was used to measure the reference droop. The output ADC code was captured

using a field-programmable gate array (FPGA), and post-processing was done on a personal computer. The

input to the THS4521, and hence in turn to the ADS8881, is a constant dc voltage (close to positive or negative

full-scale because this condition is the worst-case for charge drawn from the REF pin). The dc source must

have extremely low noise. After the REF60xx device is powered up and stable, the FPGA sends commands

to the ADS8881 to capture data in bursts. The ADS8881 is initially in idle mode for 100ms. The FPGA then

sends a command to the ADS8881 to perform 100 conversions at 1MSPS. The ADC code corresponding to

these 100 conversions (one burst of data) is stored as the first row in a 1000 × 100 dimensional array. This

operation is repeated 1000 times, and the data corresponding to each burst is stored in a new row of the 1000

× 100 dimensional array. Finally, each column in this array is averaged to get a final data-set of 100 elements.

This final data-set now has code spread that is much less than 1LSB because most of the noise has now been

removed through averaging. This data-set was plotted on a graph with X axis = column number (each column

number corresponds to 1µs of time because the sampling rate is 1MSPS), and Y axis = ADC output code to

obtain reference-droop measurements.

Bandgap

Voltage

Reference

CFILT = 1 µF

CL = 47 µF

RESR = 5 PŸ

RFILT

Buffer

+

VIN

OUT_S

OUT_F

FILT

VIN

GND_S

GND_F

Power Supply

SS

REF60xx

RLIM = 120 NŸ

EN

GND

REF

+

VIN

R = 1 NŸ

RF = 5 Ÿ

CF = 10 nF

THS4521

AINP

AINN

ADS8881

Copyright © 2016, Texas Instruments Incorporated

R = 1 NŸ

R = 1 NŸ

R = 1 NŸ

RF = 5 Ÿ

Power Supply

Figure 7-7. Burst-Mode Measurement Setup

www.ti.com

REF60

SBOS708C – MAY 2016 – REVISED APRIL 2026

Copyright © 2026 Texas Instruments Incorporated

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