8.3 Feature Description

8.3.1 Integrated ADC Drive Buffer

Many ADC data sheets specify a few microamps of average current draw from the REF pin. Almost all voltage

references provide these few microamps of average current; but not all voltage references are practical for

driving a high-resolution, high-throughput SAR ADC because the peak current drawn can be very high when

the capacitors are switched on the REF pin. The worst-case demand for the voltage reference is during a

burst-mode conversion, when the ADC is idle for a very long time, before a conversion is initiated, and the

first sample converted is expected to be precise. Usually, a large capacitor is connected between the REF pin

and ground pin (or sometimes between the REFP and REFM pins) of the ADC to smooth the current load

and reduce the burden on the voltage reference. The voltage reference must then be capable of providing the

average current required to completely charge the reference capacitor, but without causing the reference voltage

to droop significantly. Most voltage references lack the ability to completely charge the reference capacitor, and

settle when the binary-weighted capacitors are being switched onto the REF pin because of the large output

impedance. Usually, voltage references have output impedances in the range of 10's of ohms at frequencies

higher than 100Hz. The output voltage of the voltage reference must be buffered with a low output impedance

(usually high bandwidth) amplifier to achieve excellent linearity and distortion performance.

The key amplifier specifications to be considered when designing a reference buffer for a high-precision

ADC are: low offset, low drift, wide bandwidth, and low output impedance. While it is possible to select an

amplifier that sufficiently meets all these requirements, the amplifier comes at a cost of excessive power

consumption. For example, the OPA350 is a 38MHz bandwidth amplifier with a maximum offset of 0.5mV,

and low offset drift of 4µV/°C, but consumes a quiescent current of 5.2mA. This is because (from an amplifier

design perspective) offset and drift are dc specifications, whereas bandwidth, low output impedance, and high

capacitive drive capability are high-frequency specifications. Therefore, achieving all the performance in one

amplifier requires power. However, a more efficient design to meet the low power budget is to use a composite

reference buffer, which uses an amplifier with superior high-frequency specifications in the feedback loop of a

dc precision amplifier to get the overall performance at much lower power consumption. Figure 8-1 shows such

a composite amplifier design with the OPA333 (dc precision amplifier) and THS4281 (high-bandwidth amplifier).

This reference buffer design requires three devices, and a large number of external components. This solution

still consumes close to 2mA of quiescent current.

+

VIN

VOUT

GND

Temp

Trim

+

5-V Power Supply

Temp

REF5045

1 µF

200 PŸ

1 NŸ

10 µF

1 µF

OPA333

1 NŸ

1 µF

20 NŸ

1 µF

To REF pin

of ADC

200 PŸ

10 µF

VDD

THS4281

VDD

Copyright © 2016, Texas Instruments Incorporated

Figure 8-1. Composite Amplifier Reference Buffer

The REF60xx family of voltage references have an integrated low output impedance buffer (ADC drive buffer);

therefore, there is no need for an external buffer while driving the REF pin of high-precision, high-throughput

SAR ADCs, as shown in Figure 8-2. The ADC drive buffer of the REF60xx is capable of replenishing a charge

of 70 pC on a 47-µF capacitor in 1µs, without allowing the voltage on the capacitor to droop more than 1LSB at

18-bit precision. The REF60xx are trimmed at multiple temperatures in production, achieving a max drift of just

REF60

SBOS708C – MAY 2016 – REVISED APRIL 2026

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