M58LW064 datasheet(34/53 Pages) STMICROELECTRONICS

部件名	M58LW064

功能描述	64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories

PDF	53 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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34 / 53 page

M58LW064A, M58LW064B

34/53

Figure 14. Synchronous Burst Read - Continuous - Valid Data Ready Output

Valid Data Ready = Valid Low during valid clock edge (M8 = 0)

Figure 15. Synchronous Burst Pipeline Read (8.1.1.1 example)

X-Latency = 8 (M14-M11 = 0010), Y-Latency = 1 (M9 = 0), Burst Length = 1 (M2-M0 = 100),

Burst Type = Any (M7 = 0 or 1), Valid Clock Edge = Rising (M6 = 1)

AI03696

(1)

V = Valid output; NV = Not Valid output.

(2)

R is an open drain output with an internal pull up resistor of 1M

Ω.

The internal timing of R follows DQ. An external resistor, typically 300k

Ω for a single memory on the R Bus, should

be used to give a data valid set up time required to recognize valid data is evailable on the next valid clock edge.

Output (1)

tBLKH

(2)

AI03695

Valid

Clock

Edges

Outputs

Addresses

123456

789

Q0 Q1 Q2 Q3

Not Valid

2nd

Address

Latch

1st

Address

Latch

M58LW064 数据表(PDF) 34 Page - STMicroelectronics

M58LW064 数据表(HTML) 34 Page - STMicroelectronics

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