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RA4M3 数据表(PDF) 1 Page - Renesas Technology Corp |
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RA4M3 数据表(HTML) 1 Page - Renesas Technology Corp |
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1 / 98 page  RA4M3 Group Renesas Microcontrollers Leading-performance 100 MHz Arm Cortex-M33 core, up to 1 MB code flash memory with background and SWAP operation, 8 KB Data flash memory, and 128 KB SRAM with Parity/ECC. High-integration with USB 2.0 Full-Speed, SDHI, Quad SPI, and advanced analog. Integrated Secure Crypto Engine with cryptography accelerators, key management support, tamper detection and power analysis resistance in concert with Arm TrustZone for integrated secure element functionality. Features R01DS0368EJ0150 Rev.1.50 Apr 25, 2025 ■ Arm® Cortex®-M33 Core ● Armv8-M architecture with the main extension ● Maximum operating frequency: 100 MHz ● Arm Memory Protection Unit (Arm MPU) – Protected Memory System Architecture (PMSAv8) – Secure MPU (MPU_S): 8 regions – Non-secure MPU (MPU_NS): 8 regions ● SysTick timer – Embeds two Systick timers: Secure and Non-secure instance – Driven by LOCO or system clock ● CoreSight™ ETM-M33 ■ Memory ● Up to 1-MB code flash memory ● 8-KB data flash memory (100,000 program/erase (P/E) cycles) ● 128-KB SRAM ■ Connectivity ● Serial Communications Interface (SCI) × 6 – Asynchronous interfaces – 8-bit clock synchronous interface – Smart card interface – Simple IIC – Simple SPI – Manchester coding (SCI3, SCI4) ● I2C bus interface (IIC) × 2 ● Serial Peripheral Interface (SPI) ● Quad Serial Peripheral Interface (QSPI) ● USB 2.0 Full-Speed Module (USBFS) ● Control Area Network module (CAN) × 2 ● SD/MMC Host Interface (SDHI) ● Serial Sound Interface Enhanced (SSIE) ■ Analog ● 12-bit A/D Converter (ADC12) × 2 – 5 Msps at interleaving ● 12-bit D/A Converter (DAC12) × 2 ● Temperature Sensor (TSN) ■ Timers ● General PWM Timer 32-bit (GPT32) × 4 ● General PWM Timer 16-bit (GPT16) × 4 ● Low Power Asynchronous General Purpose Timer (AGT) × 6 ■ Security and Encryption ● Secure Crypto Engine 9 – Symmetric algorithms: AES – Asymmetric algorithms: RSA, ECC, and DSA – Hash-value generation: SHA224, SHA256, GHASH – 128-bit unique ID ● Arm® TrustZone® – Up to three regions for the code flash – Up to two regions for the data flash – Up to three regions for the SRAM – Individual secure or non-secure security attribution for each peripheral ● Device lifecycle management ● Pin function – Up to three tamper pins – Secure pin multiplexing ■ System and Power Management ● Low power modes ● Battery backup function (VBATT) ● Realtime Clock (RTC) with calendar and VBATT support ● Event Link Controller (ELC) ● Data Transfer Controller (DTC) ● DMA Controller (DMAC) × 8 ● Power-on reset ● Low Voltage Detection (LVD) with voltage settings ● Watchdog Timer (WDT) ● Independent Watchdog Timer (IWDT) ■ Human Machine Interface (HMI) ● Capacitive Touch Sensing Unit (CTSU) ■ Multiple Clock Sources ● Main clock oscillator (MOSC) (8 to 24 MHz) ● Sub-clock oscillator (SOSC) (32.768 kHz) ● High-speed on-chip oscillator (HOCO) (16/18/20 MHz) ● Middle-speed on-chip oscillator (MOCO) (8 MHz) ● Low-speed on-chip oscillator (LOCO) (32.768 kHz) ● IWDT-dedicated on-chip oscillator (15 kHz) ● Clock trim function for HOCO/MOCO/LOCO ● PLL/PLL2 ● Clock out support ■ General-Purpose I/O Ports ● 5-V tolerance, open drain, input pull-up, switchable driving ability ■ Operating Voltage ● VCC: 2.7 to 3.6 V ■ Operating Temperature and Packages ● Ta = -40℃ to +105℃ – 144-pin LQFP (20 mm × 20 mm, 0.5 mm pitch) – 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch) – 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch) – 144-pin BGA (7 mm × 7 mm, 0.50 mm pitch) – 64-pin BGA (6 mm × 6 mm, 0.65 mm pitch) Datasheet R01DS0368EJ0150 Rev.1.50 Apr 25, 2025 Page 1 of 98 |
类似零件编号 - RA4M3 |
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类似说明 - RA4M3 |
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