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PSD211R 数据表(PDF) 36 Page - STMicroelectronics

部件名 PSD211R
功能描述  Low Cost Field Programmable Microcontroller Peripherals
PDF  51 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

PSD211R 数据表(HTML) 36 Page - STMicroelectronics

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PSD211R Family
33
-70
-90
-15
CMiser
Symbol
Parameter
On =
Unit
Min Max Min Max Min Max
Add
T1
ALE or AS Pulse Width
18
20
40
0
ns
T2
Address Set-up Time
5
5
12
0
ns
T3
Address Hold Time
7
8
10
0
ns
T4
Leading Edge of Read to Data Active
0
0
0
0
ns
T5
ALE Valid to Data Valid
80
100
160
10
ns
T6
Address Valid to Data Valid
70
90
150
10
ns
T7
CSI Active to Data Valid
80
100
160
10
ns
T8
Leading Edge of Read to Data Valid
20
32
55
0
ns
Leading Edge of Read to Data Valid in
T8A
8031-Based Architecture Operating with PSEN
32
32
55
0
ns
and RD in Separate Mode
T9
Read Data Hold Time
0
0
0
0
ns
T10
Trailing Edge of Read to Data High-Z
20
35
35
0
ns
Trailing Edge of ALE or AS to Leading Edge
T11
of Write
000
0
ns
T12
RD, E, PSEN Pulse Width
35
45
60
0
ns
T12A
WR Pulse Width
18
25
35
0
ns
Trailing Edge of Write or Read to Leading Edge
T13
of ALE or AS
555
0
ns
T14
Address Valid to Trailing Edge of Write
70
120
150
0
ns
T15
CSI Active to Trailing Edge of Write
80
130
160
0
ns
T16
Write Data Set-up Time
18
25
30
0
ns
T17
Write Data Hold Time
5
5
10
0
ns
T18
Port to Data Out Valid Propagation Delay
25
28
35
0
ns
T19
Port Input Hold Time
0
0
0
0
ns
T20
Trailing Edge of Write to Port Output Valid
30
35
50
0
ns
T21
ADi1 or Control to CSOi2 Valid
6
20
6
25
6
35
10
ns
T22
ADi1 or Control to CSOi2 Invalid
5
20
5
25
4
35
10
ns
T23
Latched Address Outputs, Port A
22
22
28
0
ns
T30
CSI Active to CSOi2 Active
8
37
9
40
9
50
0
ns
T31
CSI Inactive to CSOi2 Inactive
8
37
9
40
9
50
0
ns
T32
Direct PAD Input3 as Hold Time
0
0
12
0
ns
T33
R/W Active to E High
18
20
30
0
ns
T34
E End to R/W
18
20
30
0
ns
T35
AS Inactive to E high
0
0
0
0
ns
T36
Address to Leading Edge of Write
18
20
25
0
ns
18.7 Timing Parameters – PSD211R/ZPSD211R (All 5 V devices)
NOTES: 1.
ADi = any address line.
2.
CSOi = any of the chip-select output signals coming through Port B (CS0–CS7) or through Port C (CS8–CS10).
3.
Direct PAD input = any of the following direct PAD input lines: CSI/A19 as transparent A19, RD/E, WR or R/W,
transparent PC0–PC2, ALE (or AS).
4.
Control signals RD/E or WR or R/W.



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