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PSD934210MIT 数据表(PDF) 5 Page - STMicroelectronics |
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PSD934210MIT 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 89 page ![]() 5/89 PSD834F2V SUMMARY DESCRIPTION The PSD family of memory systems for microcon- trollers (MCUs) brings In-System-Programmability (ISP) to Flash memory and programmable logic. The result is a simple and flexible solution for em- bedded designs. PSD devices combine many of the peripheral functions found in MCU based ap- plications. The CPLD in the PSD devices features an opti- mized macrocell logic architecture. The PSD mac- rocell was created to address the unique requirements of embedded system designs. It al- lows direct connection between the system ad- dress/data bus, and the internal PSD registers, to simplify communication between the MCU and other supporting devices. The PSD device includes a JTAG Serial Program- ming interface, to allow In-System Programming (ISP) of the entire device. This feature reduces de- velopment time, simplifies the manufacturing flow, and dramatically lowers the cost of field upgrades. Using ST’s special Fast-JTAG programming, a de- sign can be rapidly programmed into the PSD in as little as seven seconds. The innovative PSD family solves key problems faced by designers when managing discrete Flash memory devices, such as: – First-time In-System Programming (ISP) – Complex address decoding – Simulataneous read and write to the device. The JTAG Serial Interface block allows In-System Programming (ISP), and eliminates the need for an external Boot EPROM, or an external program- mer. To simplify Flash memory updates, program execution is performed from a secondary Flash memory while the primary Flash memory is being updated. This solution avoids the complicated hardware and software overhead necessary to im- plement IAP. ST makes available a software development tool, PSDsoft Express, that generates ANSI-C compli- ant code for use with your target MCU. This code allows you to manipulate the non-volatile memory (NVM) within the PSD. Code examples are also provided for: – Flash memory IAP via the UART of the host MCU – Memory paging to execute code across several PSD memory pages – Loading, reading, and manipulation of PSD macrocells by the MCU. |
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