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TDA7572 数据表(PDF) 19 Page - STMicroelectronics |
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TDA7572 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 64 page ![]() TDA7572 Electrical specifications 19/64 Output slew rate Vin=1KHz square wave, 2Vpp, INLEVEL1=0, INLEVEL0=0, no compression Time to transition from 10% to 90% 8µS AOUT clip detector Duty cycle of the Clipping signal when there is 5% distortion at the output of AOUT, f=1KHz, RL =10kOhm TBD % 15 25 f-3dB Frequency response Vin=1Vrms, INLEVEL1=0, INLEVEL0=0 20 KHz CMRR Common Mode Rejection Ratio VCM=1VRMS @1KHz CMRR= AVDIFF/AVCM INLEVEL1=0, INLEVEL0=0 No compressor 47 dB CG Common gain VCM=1VRMS @1KHz INLEVEL1=0, INLEVEL0=0 No compressor 51 dB CG Common gain VCM=1VRMS @1KHz INLEVEL1=1, INLEVEL0=0 No compressor 51 dB CG Common gain VCM=1VRMS @1KHz INLEVEL1=0, INLEVEL0=1 No compressor 51 dB CG Common gain VCM=1VRMS @1KHz INLEVEL1=1, INLEVEL0=1 No compressor 51 dB PSRR Power Supply Rejection, Vsp supply freq<10KHz 60 80 dB Voffset Output offset VOffset with respect to SVR Rin=100 ohms, Mute state -4 0 +4 mV Eno Noise Noise at output of this stage f = 20-20KHz, Rinput = 100ohms A weighting 710 µVRMS Gain compressor Maximum attenuation INLEVEL1=0, INLEVEL0=0 -21 -19 -17 dB INLEVEL1=0, INLEVEL0=1 -30 -28 -26 INLEVEL1=1, INLEVEL0=0 -25 -23 -21 INLEVEL1=1, INLEVEL0=1 -34 -32 -30 Table 8. Input stage Symbol Parameters Test conditions Min. Typ. Max. Units |
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