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STMPE821 数据表(PDF) 21 Page - STMicroelectronics |
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STMPE821 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 55 page  STMPE821 Interrupt controller module 21/55 INT_STA Interrupt status register Address: 0x0A Type: R Reset: 0x00 Description: This register is used to enable the interruption from a system related interrupt source to the host. Regardless whether the IESYSIOR bits are enabled, the ISSYSIOR bits are still updated. Writing ‘1’ clears a bit in this register. Writing ‘0’ has no effect. 7654 3 2 1 0 GPIO PWM3 PWM2 PWM1 PWM0 GEN FIFO POR [7] GPIO: One or more level transition in enabled GPIOs [6] PWM3: Completion of PWM sequence [5] PWM2: Completion of PWM sequence [4] PWM1: Completion of PWM sequence [3] PWM0: Completion of PWM sequence [2] GEN: System INT (A21, I2A, EOC) [1] FIFO: Data available in FIFO [0] POR: Power-on reset |
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