STMPE821 datasheet(22/55 Pages) STMICROELECTRONICS

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Interrupt controller module

STMPE821

22/55

GPIO_INT_EN

GPIO interrupt enable registerI

Address:

0x0B, 0x0C

Type:

R/W

Reset:

0x00

Description:

The GPIO interrupt enable register is used to enable the interruption from a particular

GPIO interrupt source to the host. The IEg[7:0] bits and the interrupt enable mask bits

correspond to the GPIO[7:0} pins.

GPIO_INT_STA

GPIO interrupt status register

Address:

0x0D

Type:

R/W

Reset:

0x00

Description:

The GPIO interrupt status register LSB monitors the status of the interruption from a

particular GPIO pin interrupt source to the host. Regardless whether the IEGPIOR

bits are enabled or not, the INT_STA_GPIO_LSB bits are still updated. The ISG[7:0]

bits are the interrupt status bits correspond to the GPIO[7:0] pins.

7654

IEG[x]

[7:0] IEG[7:0]

Interrupt enable GPIO mask (where x = 7 to 0)

Writing a ‘1’ to the IE[x] bit will enable the interruption to the host.

7654

[7:0] ISG[x]:

Interrupt status GPIO (where x = 7 to 0)

Read:

Interrupt status of the GPIO[x]. Writing ‘1’ clears a bit. Writing ‘0’ has no effect.

STMPE821 数据表(PDF) 22 Page - STMicroelectronics

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