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AS1545

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

Figure 47. Exiting Partial Power-Down Mode

Figure 48. Entering Full Power-Down Mode

Figure 49. Exiting Full Power-Down Mode

Note: It is not necessary to complete the 15 SCLKs once CSN is brought high to enter a power-down mode.

The required power-up time must elapse before a conversion can be initiated, as shown in Figure 49.

Partial Power-Down Mode

This mode is intended for use in applications where slower throughput rates are required. Either the ADC is powered

down between each conversion, or a series of conversions may be performed at a high throughput rate, and the ADC

is then powered down for a relatively long duration between these bursts of several conversions. When the AS1545 is

in partial power-down, all analog circuitry is powered down except for the on-chip reference and reference buffer.

1

15

SCLK

CSN

10

INVALID DATA

VALID DATA

1

15

The part begins to power-up

The part is fully powered-up

1

15

SCLK

CSN

10

INVALID DATA

The part enters partial power down

The part enters fully powered down

1

15

10

The part begins to power-up

INVALID DATA

Three-State

Three-State

2

2

1

15

SCLK

CSN

10

INVALID DATA

VALID DATA

1

15

The part begins to power-up

The part is fully powered-up