T410 datasheet(73/84 Pages) STMICROELECTRONICS

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11.7 ESD Pin Protection Strategy

In order to protect an integrated circuit against

Electro-Static Discharge the stress must be

controlled to prevent degradation or destruction of

the circuit elements. Stress generally affects the

circuit elements, which are connected to the pads

but can also affect the internal devices when the

supply pads receive the stress. The elements that

are to be protected must not receive excessive

current, voltage, or heating within their structure.

An ESD network combines the different input and

output protections. This network works by allowing

safe discharge paths for the pins subject to ESD

stress.

Two

critical

ESD

stress

cases

are

presented in Figure 11.8 and Figure 11.9 for

standard pins.

11.7.1 Standard Pin Protection

In order to protect the output structure the following

elements are added:

-A diodetoVDD (3a) and a diode from VSS (3b)

- A protection device between VDD and VSS (4)

In order protect the input structure the following

elements are added:

- A resistor in series with pad (1)

-A diodetoVDD (2a) and a diode from VSS (2b)

- A protection device between VDD and VSS (4)

Figure 11.8 Safe discharge path subjected to ESD stress

Figure 11.9 Negative Stress on a Standard Pad vs. VDD

OU T

(4 )

VD D

VS S

VD D

VS S

(2 a)

(2 b)

(3 a)

(3 b)

(1 )

M ain path

P ath to avoid

Main path

VSS

VDD

OUT

(3b)

(4)

(3a)

(2b)

(1)

VSS

(2a)

VDD

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