ST75951 datasheet(13/21 Pages) STMICROELECTRONICS

13 / 21 page

MUX

F0 or F0/2

LOW

PASS

FILTER

DETECTOR

Bit DR

ATTENUATION

0dB/6dB/Infinite

AUXIN

RING

ANALOG

MODULATOR

GAIN

HIGH

PASS

FILTER

MUX

DAC 1 BIT

FIRST ORDER

DIFFERENTIAL

SWITCHED

CAPACITOR FILTER

F0 or F0/2

Figure 21

FUNCTIONAL DESCRIPTION (continued)

10 - Host Interface

Table 3

HC1

HC0

LSB

2nd FS

Mode Description

000

Software mode,

data transfer only

001

yes

Software mode,

data xfer + control xfer

Hardware mode,

data transfer only

yes

Hardware mode,

data + control transfer

The host interface is a Serial Synchronous Inter-

face (FS, SCLK, DOUT, DIN).

Two modes of serial transfer are available and are

selected via pins HC0 and HC1.

First mode is a software mode control (15 bits

transmit data and 16 bits receive data). In this mode

ST75951 is completely controlled through the SSI,

the access of control register is done by managing

the LSB of the transmit data word.

Second mode is a hardware mode control (16bits

data transmit and receive). In this mode the access

of control register is done via dynamic setting of

Pins HC0 and HC1 (see Table 3).

The bit 15 of the control word is used to do a read

only or a read and write of control register

(bit 15 = 1 Read only, bit 15 = 0 Read & Write).

11 - Control Registers

This section defines how to handle the 4 registers

implemented in ST75951.

11.1 - Write / Read Operation (D15 = 0)

This is a one sampling frequency period duration

operation, where the 16-bit word sent from the host

on DIN, contains the write qualifier, the address

Contemporaly ST75951 ouptuts on DOUT the

DATA WORD INPUT

@regN+cont.word

D15

DATA WORD OUTPUT

HC0

HC1

Sampling Period

1/2 Sampling Period

Figure 22 : WRITE REG n , READ default REG 2

ST75951

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