STLC1512

18/26

Appendix A - PGA Gain Calculations

The application requires some drop from the output of the hybrid balance to the input of the PGA in order to

keep the signal level at an acceptable level. (see Table 5) The input is reduced by placing a resistor between

a resistor divider between the hybrid balance and the input. Second, it allows a capacitor to be placed across

the input of the PGA to create a first order low pass filter. This further reduces the signal in long loop cases.

The resistor divider is formed by the external resistor and the input impedance of the PGA. The gain from the

hybrid balance to the output of the PGA is therefore given by

Equation can also be used to determine variations over process and temperature. To accomplish this just de-

termine the max and min values using the input resistance variation given in Table .

To convert the noise numbers in Table to line referred noise numbers use

H is the hybrid loss (9.54dB in the reference design),

and G is given by

20

R

in put

R

in put

R

ex t

+

----------------------------------







log

G

tab le

+

N

dB

10

1000

100

------------- V

n

2





log

G

H

++

=

G20

R

inp ut

R

ext

+

R

inp ut

----------------------------------







log

=