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STMPE2403 数据表(PDF) 15 Page - STMicroelectronics |
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STMPE2403 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 63 page ![]() STMPE2403 I2C Interface 15/63 6.5 Slave device address The slave device address is a 7 or 10-bit address, where the least significant 2-bit are programmable. These 2-bit values will be loaded in once upon reset and after that these 2 pins no longer be needed with the exception during General Call. Up to 4 STMPE2403 devices can be connected on a single I2C bus. 6.6 Memory addressing For the bus master to communicate to the slave device, the bus master must initiate a Start condition and followed by the slave device address. Accompanying the slave device address, there is a Read/Write bit (R/W). The bit is set to 1 for Read and 0 for Write operation. If a match occurs on the slave device address, the corresponding device gives an acknowledgement on the SDA during the 9th bit time. If there is no match, it deselects itself from the bus by not responding to the transaction. Table 13. Slave device address ADDR 1 ADDR 0 Address 0 0 0x84 0 1 0x86 1 0 0x88 11 0x8A |
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