STWD100

Operation

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Operation

The STWD100 device is used to detect an out-of-control MCU. The user has to ensure

watchdog reset within the watchdog timeout period, otherwise the watchdog output is

asserted and MCU is restarted. The STWD100 can be also enabled or disabled by the chip-

enable pin.

2.1

Watchdog input (WDI)

period, is cleared either:

1.

by a transition on watchdog output, WDO (see Figure 8) or

2.

by a pulse on enable pin, EN (see Figure 10) or

3.

by toggling WDI input (low-to-high on all versions and high-to-low on STWD100xW,

STWD100xX and STWD100xY only).

The pulses on WDI input with a duration of at least 1 µs are detected and glitches shorter

than 100 ns are ignored.

If WDI is permanently tied high or low and EN is tied low, the WDO toggles every 3.4 ms

STWD100xY (see Figure 8).

2.2

Watchdog output (WDO)

low (see Figure 6).

STWD100xY regardless of possible WDI transitions (see Figure 9). On STWD100xP WDO

(see Figure 8 and Figure 9).

The STWD100 has an active-low open drain or push-pull output. An external pull-up resistor

connected to any supply voltage up to 6 V is required in case of open drain WDO output

(see Figure 4). Select a resistor value large enough to register a logic low, and small enough

to register a logic high while supplying all input current and leakage paths connected to the

reset output line. A 10 k

Ω pull-up resistor is sufficient in most applications.