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STWD100 数据表(PDF) 14 Page - STMicroelectronics |
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STWD100 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 25 page ![]() Watchdog timing STWD100 14/25 Figure 10. Enable pin, EN, triggering X DISABLED X DISABLED STWD100xx STWD100xx AI12666 Whenever EN is high, all timing is reset, and the part is disabled. Timing commences from 0 when EN goes low. If EN goes high while WDO is asserted, WDO will de-assert but only after the nominal minimum pulse width of 10 µs has elapsed. VCC VCC WDI WDI WDO WDO EN EN ~ 2.2 V X (ie, 1 or 0 but not floating) >10 µs min. X (ie, 1 or 0 but not floating) < tWD tWD tWD tWD |
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