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LFSC 数据表(PDF) 49 Page - Lattice Semiconductor

部件名 LFSC
功能描述  LatticeSC/M Family Data Sheet
PDF  237 Pages
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制造商  LATTICE [Lattice Semiconductor]
网页  http://www.latticesemi.com
标志 LATTICE - Lattice Semiconductor

LFSC 数据表(HTML) 49 Page - Lattice Semiconductor

Back Button LFSC Datasheet HTML 45Page - Lattice Semiconductor LFSC Datasheet HTML 46Page - Lattice Semiconductor LFSC Datasheet HTML 47Page - Lattice Semiconductor LFSC Datasheet HTML 48Page - Lattice Semiconductor LFSC Datasheet HTML 49Page - Lattice Semiconductor LFSC Datasheet HTML 50Page - Lattice Semiconductor LFSC Datasheet HTML 51Page - Lattice Semiconductor LFSC Datasheet HTML 52Page - Lattice Semiconductor LFSC Datasheet HTML 53Page - Lattice Semiconductor Next Button
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3-5
DC and Switching Characteristics
Lattice Semiconductor
LatticeSC/M Family Data Sheet
PURESPEED I/O Single-Ended DC Electrical Characteristics
Over Recommended Operating Conditions
Input/Output
Standard
VIL
VIH
VOL Max.
(V)
VOH Min.
(V)
IOL
(mA)
IOH
(mA)
Min. (V)
Max. (V)
Min. (V)
Max. (V)
LVCMOS 33
-0.3
0.8
2
3.465
0.4
2.4
24, 16, 8
-24, -16, -8
0.2
VCCIO - 0.2
0.1
-0.1
LVTTL
-0.3
0.8
2
3.465
0.4
2.4
24, 16, 8
-24, -16, -8
0.2
VCCIO - 0.2
0.1
-0.1
LVCMOS 25
-0.3
0.7
1.7
2.65
0.4
VCCIO - 0.4
16, 12, 8, 4 -16, -12, -8, -4
0.2
VCCIO - 0.2
0.1
-0.1
LVCMOS 18
-0.3
0.35VCCIO
0.65VCCIO
2.65
0.4
VCCIO - 0.4
16, 12, 8, 4 -16, -12, -8, -4
0.2
VCCIO - 0.2
0.1
-0.1
LVCMOS 15
-0.3
0.35VCCIO
0.65VCCIO
2.65
0.4
VCCIO - 0.4
16, 12, 8, 4 -16, -12, -8, -4
0.2
VCCIO - 0.2
0.1
-0.1
LVCMOS 12
-0.3
0.35VCCIO
0.65VCCIO
2.65
0.3
VCCIO - 0.3
12, 8, 4, 2
-12, -8, -4, -2
0.2
VCCIO - 0.2
0.1
-0.1
PCIX15
-0.3
0.3VCCIO
0.5VCCIO
1.5
0.1VCCIO
0.9VCCIO
1.5
-0.5
PCI33
-0.3
0.3VCCIO
0.5VCCIO
3.465
0.1VCCIO
0.9VCCIO
1.5
-0.5
PCIX33
-0.3
0.35VCCIO
0.5VCCIO
3.465
0.1VCCIO
0.9VCCIO
1.5
-0.5
AGP-1X, AGP-2X
-0.3
0.3VCCIO
0.5VCCIO
3.465
0.1VCCIO
0.9VCCIO
1.5
-0.5
SSTL3_I
-0.3
VREF - 0.2
VREF + 0.2
3.465
0.7
VCCIO - 1.1
8
-8
SSTS3_I OST
2
-0.3
VREF - 0.2
VREF + 0.2
3.465
0.9
VCCIO - 1.3
8
-8
SSTL3_II
-0.3
VREF - 0.2
VREF + 0.2
3.465
0.5
VCCIO - 0.9
16
-16
SSTL3_II OST
2
-0.3
VREF - 0.2
VREF + 0.2
3.465
0.9
VCCIO - 0.13
16
-16
SSTL2_I
-0.3
VREF - 0.18
VREF + 0.18
2.65
0.54
VCCIO - 0.62
7.6
-7.6
SSTL2_I OST
2
-0.3
VREF - 0.18
VREF + 0.18
2.65
0.73
VCCIO - 0.81
7.6
-7.6
SSTL2_II
-0.3
VREF - 0.18
VREF + 0.18
2.65
0.35
VCCIO - 0.43
15.2
-15.2
SSTL2_II OST
2
-0.3
VREF - 0.18
VREF + 0.18
2.65
0.73
VCCIO - 0.81
15.2
-15.2
SSTL18_I
-0.3
VREF - 0.125 VREF + 0.125
2.65
0.28
VCCIO - 0.28
13.4
-13.4
SSTL18_II
-0.3
VREF - 0.125 VREF + 0.125
2.65
0.28
VCCIO - 0.28
13.4
-13.4
HSTL15_I
-0.3
VREF - 0.1
VREF + 0.1
2.65
0.4
VCCIO - 0.4
8
-8
HSTL15_II
-0.3
VREF - 0.1
VREF + 0.1
2.65
0.4
VCCIO - 0.4
16
-16
HSTL15_III1
-0.3
VREF - 0.1
VREF + 0.1
2.65
N/A
N/A
N/A
N/A
HSTL15_IV1
-0.3
VREF - 0.1
VREF + 0.1
2.65
N/A
N/A
N/A
N/A
HSTL18_I
-0.3
VREF - 0.1
VREF + 0.1
2.65
0.4
VCCIO - 0.4
9.6
-9.6
HSTL18_II
-0.3
VREF - 0.1
VREF + 0.1
2.65
0.4
VCCIO - 0.4
19.2
-19.2
HSTL18_III1
-0.3
VREF - 0.1
VREF + 0.1
2.65
N/A
N/A
N/A
N/A
HSTL18_IV1
-0.3
VREF - 0.1
VREF + 0.1
2.65
N/A
N/A
N/A
N/A
GTL12
1,
GTLPLUS15
1
-0.3
VREF - 0.2
VREF + 0.2
N/A
N/A
N/A
N/A
N/A
1. Input only.
2. Input with on-chip series termination.



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