ST72334J2TASLASHXXX datasheet(18/150 Pages) STMICROELECTRONICS

18 / 150 page

ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto

18/150

5 FLASH PROGRAM MEMORY

5.1 INTRODUCTION

Flash devices have a single voltage non-volatile

Flash memory that may be programmed in-situ (or

plugged in a programming tool) on a byte-by-byte

basis.

5.2 MAIN FEATURES

■ Remote In-Situ Programming (ISP) mode

■ Up to 16 bytes programmed in the same cycle

■ MTP memory (Multiple Time Programmable)

■ Readout memory protection against piracy

5.3 STRUCTURAL ORGANIZATION

The Flash program memory is organized in a sin-

gle 8-bit wide memory block which can be used for

storing both code and data constants.

The Flash program memory is mapped in the up-

per part of the ST7 addressing space and includes

the reset and interrupt user vector area.

5.4 IN-SITU PROGRAMMING (ISP) MODE

The Flash program memory can be programmed

using Remote ISP mode. This ISP mode allows

the contents of the ST7 program memory to be up-

dated using a standard ST7 programming tools af-

ter the device is mounted on the application board.

This feature can be implemented with a minimum

number of added components and board area im-

pact.

An example Remote ISP hardware interface to the

standard ST7 programming tool is described be-

low. For more details on ISP programming, refer to

the ST7 Programming Specification.

Remote ISP Overview

The Remote ISP mode is initiated by a specific se-

quence on the dedicated ISPSEL pin.

The Remote ISP is performed in three steps:

– Selection of the RAM execution mode

– Download of Remote ISP code in RAM

– Execution of Remote ISP code in RAM to pro-

gram the user program into the Flash

Remote ISP hardware configuration

In Remote ISP mode, the ST7 has to be supplied

with power (VDD and VSS) and a clock signal (os-

cillator and application crystal circuit for example).

This mode needs five signals (plus the VDD signal

if necessary) to be connected to the programming

tool. This signals are:

– RESET: device reset

–VSS: device ground power supply

– ISPCLK: ISP output serial clock pin

– ISPDATA: ISP input serial data pin

– ISPSEL: Remote ISP mode selection. This pin

must be connected to VSS on the application

board through a pull-down resistor.

If any of these pins are used for other purposes on

the application, a serial resistor has to be imple-

mented to avoid a conflict if the other device forces

the signal level.

Figure 5 shows a typical hardware interface to a

standard ST7 programming tool. For more details

on the pin locations, refer to the device pinout de-

scription.

Figure 5. Typical Remote ISP Interface

5.5 MEMORY READOUT PROTECTION

The readout protection is enabled through an op-

tion bit.

For Flash devices, when this option is selected,

the program and data stored in the Flash memory

are protected against readout piracy (including a

re-write protection). When this protection option is

removed the entire Flash program memory is first

automatically erased. However, the EEPROM

data memory (when available) can be protected

only with ROM devices.

ISPSEL

VSS

RESET

ISPCLK

ISPDATA

ST7

HE10 CONNECTOR TYPE

TO PROGRAMMING TOOL

10K

Ω

CL0

CL1

APPLICATION

47K

Ω

XTAL

ST72334J2TA/XXX 数据表(PDF) 18 Page - STMicroelectronics

ST72334J2TA/XXX 数据表(HTML) 18 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载