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STW4811MBRA/LF 数据表(PDF) 21 Page - STMicroelectronics |
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STW4811MBRA/LF 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 86 page ![]() Functional description STw4811M/STw4811N 20/85 4.2.4 I2C Interface The device supports two I2C bus interfaces. One main interface (SDA,SCL) controls power management and all programmable functions, the second interface (USBSDA, USBSCL) is dedicated to USB control. STw4811 allows to work with only the main I2C interface to control all the functions, including the USB, via ‘usb_i2c_ctrl’ bit of power control register ( Table 23). I2C interface is used to read status information from inside the device. Flags, interrupt and write registers are used to configure the device functions (threshold, clock division, output voltage, etc....). By default, the main I2C interface (SCL,SDA) controls the main registers and USB I2C interface (USBSCL, USBSDA) controls USB registers. Figure 6. I2C interface block diagram Both I2C are configured as slave serial interface compatible with I2C registered trademark of Phillips Inc. (version 2.1). I2C interface description Note: When not using the USB I2C interface, the two pins USBSCL and USCSDA must be connected to the VIO voltage. STw4811 I2C is a slave serial interface with a serial data line (SDA or USBSDA) and a serial clock line (SCL or USBSCL): ● SCL / USBSCL: input clock used to shift data ● SDA / USBSDA: input/output bidirectional data transfers It is composed of: ● One filter to reject spikes on the bus data line and preserve data integrity ● Bidirectional data transfers up to 400kbit/s (fast mode) via SDA or USBSDA signal The SDA or USBSDA signal contains the input/output control and data signals that are shifted in the device, MSB first. The first bit must be high (START) followed by the Device ID (7 bits) and Read/Write bit control (1 indicates read access, a logical 0 indicates a write access). ● Device ID in write mode: 5Ah (01011010) ● Device ID in read mode: 5Bh (01011011) Then STw4811 sends an acknowledge at the end of an 8 bit transfer. The next 8 bits correspond to the register address followed by another acknowledge. The 8-bit data field is sent last, followed by a last acknowledge. Main registers SDA USBSCL SCL SDA or USBSDA SCL or USBSCL USBSDA USB registers SDA SCL usb_i2c_ctrl |
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