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STW4811MBRA/LF 数据表(PDF) 35 Page - STMicroelectronics

部件名 STW4811MBRA/LF
功能描述  Power management for multimedia processors
PDF  86 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW4811MBRA/LF 数据表(HTML) 35 Page - STMicroelectronics

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Functional description
STw4811M/STw4811N
34/85
Power control register at address 08h
Power control register at address 09h
Table 25.
Power control register at address 08h
Address 1Fh
Address 1Eh
15
14
13
12
11
10
9876
5
4
3
2
1
0
Not used
0100
0
en_clk
squarer
en_
mo
nitoring
en_
vana
not
used
EN
Bits
Name
Value
Settings
Default
4
en_clock_squarer
0
1
Disabled ([0; vio_vmem] digital signal)
Enabled
(master clock input not in the range [0; vio_vmem])
0
3
en_monitoring
0
1
Disabled / MONITORING = OFF
Enabled / VCORE & VIO_VMEM monitoring = ON
1
2
en_vana
0
1
Disabled / VANA = OFF
Enabled / VANA = ON
1
Table 26.
Power control register at address 09h
Address 1Fh
Address 1Eh
15
14
13
12
11
10
9876
5
4321
0
Not used
0100
1
vaux_
sleep
not
used
vio_
vmem_
sleep
(1)
1.
Must be left at default value if the master clock is used.
vcore_
sleep
(1)
EN
Bits
Name
Value
Settings
Default
4
vaux_sleep
0
1
When PWREN is low:
VAUX stays in high power mode
VAUX goes in sleep mode
1
2
vio_vmem_sleep
0
1
When PWREN is low:
VIO_VMEM stays in high power mode
VIO_VMEM goes in sleep mode
1
1vcore_sleep
0
1
When PWREN is low:
VCORE stays in high power mode
VCORE goes in sleep mode
1



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