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STPC12GDYC 数据表(PDF) 16 Page - STMicroelectronics |
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STPC12GDYC 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 111 page  PIN DESCRIPTION 16/111 Issue 1.0 - July 24, 2002 LOCAL BUS INTERFACE PA[24:20,15,9:8,3:0] O BD4STRP_FT Address Bus [24:20], [15], [9:8], [3:0] 12 PA[19,11] O BD8STRP_FT Address Bus [19], [11] 2 PA[18:16,14:12,7:4] O BD8STRUP_FT Address Bus [18:16], [14:12], [7:4] 10 PA[10] O BD4STRUP_FT Address Bus [10] 1 PD[15:0] I/O BD8STRP_FT Data Bus [15:0] 16 PRD# O BD4STRUP_FT Memory and I/O Read signal 1 PWR# O BD4STRUP_FT Memory and I/O Write signal 1 PRDY I BD8STRUP_FT Data Ready 1 IOCS#[7:4] O BD4STRUP_FT I/O Chip Select 4 IOCS#[3] O BD4STRP_FT I/O Chip Select 1 IOCS#[2:0] O BD8STRUP_FT I/O Chip Select 3 PBE#[1] O BD8STRP_FT Upper Byte Enable (PD[15:8]) 1 PBE#[0] O BD4STRUP_FT Lower Byte Enable (PD[7:0]) 1 FCS0# O BD4STRP_FT Flash Bank 0 Chip Select 1 FCS1# O BT8TRP_TC Flash Bank 1 Chip Select 1 FCS_0H# O BD8STRP_FT Upper half Bank 0 Flash Chip Select 1 FCS_0L# O BD8STRP_FT Lower half Bank 0 Flash Chip Select 1 FCS_1H# O BD8STRP_FT Upper half Bank 1 Flash Chip Select 1 FCS_1L# O BD8STRP_FT Lower half Bank 1 Flash Chip Select 1 IRQ_MUX[3:0]1 I/O BD4STRP_FT Muxed Interrupt Lines 4 IDE CONTROLLER DD[15:12] I/O BD4STRP_FT Data Bus 4 DD[11:0] I/O BD8STRUP_FT Data Bus 12 DA[2:0] O BD8STRUP_FT Address Bus 3 PCS1, PCS3 O BD8STRUP_FT Primary Chip Selects 2 SCS1, SCS3 O BD8STRUP_FT Secondary Chip Selects 2 DIORDY O BD8STRUP_FT Data I/O Ready 1 PIRQ/SIRQ I BD4STRP_FT Primary / Secondary Interrupt Request 2 PDRQ/SDRQ I BD4STRP_FT Primary / Secondary DMA Request 2 PDACK#/SDACK# O BD8STRP_FT Primary / Secondary DMA Acknowledge 2 PDIOR#/SDIOR# O BD8STRUP_FT Primary / Secondary IO Read 2 PDIOW#/SDIOW# O BD8STRP_FT Primary / Secondary IO Write 2 VGA CONTROLLER RED, GREEN, BLUE O VDDCO Red, Green, Blue 3 VSYNC, HSYNC I/O BD4STRP_FT Vertical & Horizontal Synchronisations 2 VREF_DAC I ANA DAC Voltage reference 1 RSET I ANA Resistor Set 1 COMP I ANA Compensation 1 COL_SEL O BD4STRP_FT Colour Select 1 I2C INTERFACE SCL / DDC[1] I/O BD4STRUP_FT I²C Interface - Clock / VGA DDC[1] 1 SDA / DDC[0] I/O BD4STRUP_FT I²C Interface - Data / VGA DDC[0] 1 TFT INTERFACE TFTR[5:2] O BD4STRP_TC Red 4 TFTR[1:0] O BD4STRP_FT Red 2 TFTG[5:2] O BD4STRP_TC Green 4 ,TFTG[1:0] O BD4STRP_FT Green 2 Table 2-2. Definition of Signal Pins Signal Name Dir Buffer Type1 Description Qty Note1; See Table 2-3 for buffer type descriptions |
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