M41ST87WMX6 datasheet(25/48 Pages) STMICROELECTRONICS

25 / 48 page

M41ST87Y, M41ST87W

Operating modes

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tamper connect mode bit (TCMX). If the selected switch mode is normally open (TCMX = '1'),

the tamper pin will be triggered by being connected to VSS (if the TPMX bit is set to '0') or to

VCC (if the TPMX bit is set to '1'), through the closing of the external switch. When the

external switch is closed, the tamper bit will be immediately set, allowing the user to

determine if the device has been physically tampered with. If the selected switch mode is

normally closed (TCMX = '0'), the tamper pin will be triggered by being pulled to VSS or to

VOUT (depending on the state of the TPMX bit), through an internal pull-up/pull-down resistor

as a result of opening the external switch.

When a tamper event occurs, the tamper bits (TB1 and/or TB2) will be immediately set if

TEBX = '1.'

If the tamper interrupt enable bit (TIEX) is set to a '1,' the IRQ/OUT pin will also be activated.

The IRQ/OUT output is cleared by a READ of the flags register (as seen in Figure 23 on

page 33), a reset of the TIE bit to '0,' or the RST output is enabled.

Note:

In order to avoid an inadvertent activation of the IRQ/OUT pin due to a prior tamper event,

the flag register (0Fh) should be read prior to resetting the TEBX bit.

The tamper bits are “read only” bits and are reset only by writing the tamper enable bit

(TEBX) to '0.'

The tamper detect function operates both under normal power, and in battery backup. Even

if the trigger event occurs during a power-down condition, the bit will be set correctly.

2.8

Sampling

As the switch mode normally closed (TCMX = '0') requires a greater amount of current to

maintain constant monitoring, the M41ST87Y/W offers a programmable tamper detect

sampling bit (TDSX) to reduce the current drawn on VCC or VBAT (see Figure 16 on

page 22). When enabled, the sampling frequency is once per second (1Hz), for

approximately 1 ms.

When TEBX is disabled, no current will be drawn by the tamper detection circuit. After a

tamper event has been detected, no additional current will be drawn.

Note:

The oscillator must be running for tamper detection to operate in the sampling mode. If the

oscillator is stopped, the tamper detection circuit will revert to constant monitoring.

Note:

Sampling in the tamper high mode (TPMX = '1') may be bypassed while on VCC by

connecting the TPXIN pin to VCC through an external resistor. This will allow constant

monitoring when VCC is “on” and revert to sampling when in battery backup (see Figure 13

on page 19).

2.9

Internal tamper pull-up/down current

Depending on the capacitive and resistive loading of the tamper pin input (TPXIN), the user

may require more or less current from the internal pull-up/down used when monitoring the

normally closed switch mode. The state of the tamper current hi/tamper current low bit

(TCHI/TCLOX) determines the sizing of the internal pull-up/-down. TCHI/TCLOX = '1' uses a

1 M

Ω pull-up/-down resistor, while TCHI/TCLOX = '0' uses a 10 MΩ pull-up/-down resistor

(see Figure 17 on page 23).

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