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M41ST87WMX6 数据表(PDF) 39 Page - STMicroelectronics

部件名 M41ST87WMX6
功能描述  5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
PDF  48 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M41ST87WMX6 数据表(HTML) 39 Page - STMicroelectronics

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M41ST87Y, M41ST87W
Clock operation
39/48
Table 12.
trec definitions
Note:
All other control bits are undetermined.
trec bit (TR)
STOP bit (ST)
trec time
Units
Min
Max
00
96
98(1)
1.
Default setting
ms
0
1
40
200
ms
1
X
50
2000
µs
Table 13.
Default values
Condition
TR
ST
OF
OFIE
HT(1)
Out
FT
AFE
Initial power-up
0
0
1
0
1
1
0
0
Subsequent power-up (with
battery backup)(2)(3)
UC
UC
UC
0
⇑
1
⇓
UC
0
⇓
0
⇑
Condition
ABE
SQWE
SQWOD
PFOD
Watchdog register(4)
Initial power-up
0
0
1
1
0
Subsequent power-up (with
battery backup)(2)(3)
0
⇑
0
⇑
UC
UC
0
⇓
Condition
32kE
THS
TEB1 and 2
TCM1 and 2
TPM1 and 2
TDS1 and 2
Initial power-up
1(5)
00
0
0
0
Subsequent power-up (with
battery backup)(2)
UC
UC
UC
UC
UC
UC
Condition
TCHI/TCLO1
and 2
CLR1
and 2
TIE1 and 2
CLRPW0
CLRPW1
CLR1EXT
and
CLR2EXT
Initial power-up
0
0
0
0
0
0
Subsequent power-up (with
battery backup)(2)
UC
UC
0
⇑
UC
UC
UC
1.
When TEBX is set to '1,' the HT bit will not be set on power-down (tamper time-stamp will have precedence).
2.
UC = unchanged.
3.
⇑ = V
CC rising; ⇓ = VCC falling.
4.
WDS, BMB0-BMB4, RB0, RB1.
5.
32 kHz output valid only on VCC.



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