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33742S 数据表(PDF) 38 Page - Freescale Semiconductor, Inc

部件名 33742S
功能描述  System Basis Chip with Enhanced High Speed CAN Transceiver
PDF  70 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

33742S 数据表(HTML) 38 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
38
Freescale Semiconductor
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 20. CAN Interface Levels
TXD AND RXD PINS
The TXD pin has an internal pullup to V2. The state of TXD
depends on the V2 status. RXD is a push-pull structure,
supplied by V2. When V2 is set at 5.0V and CAN is TXRX
mode, RXD reports bus status. For details, refer to Table 7,
page 29, Table 9, below, and Table 10, page 39.
The TXD pin is a push-pull structure between the V2 pin
and GND. The circuitry has a parasitic diode between RXD
and V2. It is illustrated in Figure 25. This parasitic diode is
reversed biased in normal operation (TXD voltage is lower or
equal to V2). In case the TXD voltage is greater than V2, a
current will flow into the diode.
If the V2 pin is low (e.g. in sleep mode, or in stop with a
ballast transistor), the current leakage at V2 is low enough
(10
μA max) to ensure than the RXD pin can be pulled up by
an external resistor (i.e. the MCU RXD pin internal pullup).
The states of the RXD pin in the following Table 9 and 10
is dependant upon external circuitry connected to the V2 and
RXD pins.
CAN TXRX MODE AND SLEW RATE SELECTION
The slew rate selection is done via CAN register (refer to
Tables 21 through 23 on page 50). Four slew rates are
available and control the recessive-to-dominant and
dominant-to-recessive transitions. The delay time from TXD
pin to CAN bus, from CAN bus to RXD, and from the TXD to
RXD loop time is affected by the slew rate selection.
CANH
TXD
RXD
Typ 2.5V
CANL
CAN Recessive State
CAN Dominant State
CAN Recessive State
Typ 2.5V
VCANH-VCANL > 900mV
VCANH-VCANL < 500mV



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