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33742S 数据表(PDF) 60 Page - Freescale Semiconductor, Inc |
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33742S 数据表(HTML) 60 Page - Freescale Semiconductor, Inc |
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60 / 70 page ![]() Analog Integrated Circuit Device Data 60 Freescale Semiconductor 33742 TYPICAL APPLICATIONS POWER-UP AND VDD GOING LOW WITH SLEEP MODE AS DEFAULT LOW POWER MODE IS SELECTED The first part of Figure 35 is identical to Figure 34. If VDD is pulled below the VDD under-voltage reset (typ 4.6V), say by an over-current or short-circuit (for instance, short to 4.0V), and if the low power mode previously selected was Sleep mode and if the BATFAIL flag has been cleared, the 33742 enters in Reset mode for a time period of 100ms. The WDOG pin stays HIGH, but the high level (VOH) follows VDD level. The RST and INT pins are low. After 100ms the 33742 goes into Sleep mode, and the VDD and V2 are off. Figure 35 shows an example wherein VDD is shorted to 4.0V, and after 100ms the 33742 enters Sleep mode. . Figure 35. Under-voltage at VDD. Sleep mode selected. Figure 36. CAN Bus Standard Termination Figure 37. CAN Bus Split Termination VDD SPI (CS) WD RST INT Watchdog Refresh Under-voltage at VDD SBC in Reset mode & Reset modes Reset each 350ms mode Reset mode 100ms SBC in Normal Request SBC in Normal SBC in Sleep mode SBC in Reset mode for 100ms, then enter Sleep mode R5 CL CANL (33742) CH CANH (33742) CAN Connector CANL CANH Legend R5: 60 Ω CL, CH: 220pF R6 CL CANL (33742) CH CANH (33742) CAN Connector R7 CS CANH CANL Legend R6, R7: 30 Ω CL, CH: 220pF CS: > 470pF |
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