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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HD404324FS 数据表(PDF) 26 Page - Renesas Technology Corp |
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HD404324FS 数据表(HTML) 26 Page - Renesas Technology Corp |
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26 / 103 page  HD404054 Series/HD404094 Series 24 Reset by RESET input or by watchdog timer fOSC: ø CPU: ø PER: Oscillate Stop fcyc fOSC: ø CPU: ø PER: Oscillate fcyc fcyc fOSC: ø CPU: ø PER: Standby mode (TMA3 = 0) SBY Interrupt fOSC: fcyc: Main oscillation frequency f /4 or or f /32 (hardware selectable) OSC System clock Clock for other peripheral functions Active mode ø CPU: ø: PER RESET1 RESET2 RAME = 0 RAME = 1 STOPC STOP OSC Stop Stop Stop Stop mode Figure 11 MCU Status Transitions Active Mode: All MCU functions operate according to the clock generated by the system oscillators OSC 1 and OSC 2. Standby Mode: In standby mode, the oscillators continue to operate, but the clocks related to instruction execution stop. Therefore, the CPU operation stops, but all RAM and register contents are retained, and the D or R port status, when set to output, is maintained. Peripheral functions such as interrupts, timers, and serial interface continue to operate. The power dissipation in this mode is lower than in active mode because the CPU stops. The MCU enters standby mode when the SBY instruction is executed in active mode. Standby mode is terminated by a RESET input or an interrupt request. If it is terminated by RESET input, the MCU is reset as well. After an interrupt request, the MCU enters active mode and executes the next instruction after the SBY instruction. If the interrupt enable flag is 1, the interrupt is then processed; if it is 0, the interrupt request is left pending and normal instruction execution continues. A flowchart of operation in standby mode is shown in figure 12. |
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