HD404324FS datasheet(32/103 Pages) RENESAS

部件名	HD404324FS

功能描述	microcomputer designed to increase program productivity

PDF	103 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

32 / 103 page

HD404054 Series/HD404094 Series

Internal Oscillator Circuit

A block diagram of the clock generation circuit is shown in figure 17. As shown in table 18, a ceramic

oscillator can be connected to OSC

1 and OSC2.

The system oscillator can also be operated by an external

clock.

After

RESET input or after stop mode has been cancelled, the division ratio of the system clock can be

selected as 1/4 or 1/32 by setting the SEL pin level.

• 1/4 division ratio: Connect SEL to V

CC.

• 1/32 division ratio: Connect SEL to GND.

OSC2

OSC1

System

oscillator

1/4 or

1/32

division

circuit*

Timing

generator

circuit

CPU with ROM,

RAM, registers,

flags, and I/O

Peripheral

function

interrupt

fcyc

tcyc

fOSC

CPU

PER

Note: * 1/4 or 1/32 division ratio can be selected by SEL pin.

Figure 17 Clock Generation Circuit

OSC2

GND

RESET

OSC1

RE0

TEST

GND

Figure 18 Typical Layout of Ceramic Oscillator

HD404324FS 数据表(PDF) 32 Page - Renesas Technology Corp

HD404324FS 数据表(HTML) 32 Page - Renesas Technology Corp

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