STV2000 datasheet(25/38 Pages) STMICROELECTRONICS

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STV2000

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OPERATING DESCRIPTION (continued)

3.6 Dynamic Horizontal Phase Control

IOUT=K4 (VOUT - VDCMID) + K5 (VOUT - VDCMID)

K4 is adjustable via the parallelogram I2C register.

K5 is adjustable via the side pin balance I

2C register.

3.7 Horizontal Breathing

Horizontal breathing compensation is performed

through the EW stage with the Voltage-Current

Converter. This DC-controlled input provides the

required horizontal width corrections to offset

width changes arising from EHT variations.

3.8 Vertical Breathing

Vertical breathing compensation is performed

through the gain modulation of the vertical ramp.

This DC-controlled input provides the vertical

height corrections required to offset height chang-

es arising from EHT variations.

B PRE-AMPLIFIER PART

1. GENERAL CONSIDERATIONS

1.1 Input Stage

The R, G and B signals must be supplied to the

three inputs through coupling capacitors (100nF).

The maximum input peak-to-peak video amplitude

is 1 V.

The input stage includes a clamping function. This

clamp uses the input serial capacitor as ”memory

capacitor” and is gated by an internally generated

”Back-Porch-Clamping-Pulse (BPCP)”.

The BPCP is synchronized on the second edge of

the horizontal pulse HIN inputs on Pin 44.

Figure 15. .

In both cases, BPCP width is fixed.

1.2 Contrast Adjustment (7 bits)

The contrast adjustment is made by simultaneous-

ly controlling the gain of three internal variable

gain amplifiers through the I

2C bus interface. The

contrast adjustment allows covering a range high-

er than 40 dB. This adjustment is refreshed during

the vertical retrace time.

1.3 ABL Control

The STV2000 has an ABL input (automatic beam

limitation) to attenuate RGB video signals accord-

ing to beam intensity.

The operating range is typically 2.5 V, from 5.3 V

to 2.0 V. A typical 12 dB Max. attenuation is ap-

plied to the signal whatever the current gain. Refer

to Figure 16 for ABL input attenuation range.

In the case of software control, the ABL input must

be pulled to AVCC through a resistor to limit power

consumption.

ABL input voltage must not exceed VAVCC. Input

resistor is 10k

Ω.

HSYNC

BPCP

Internal pulse width is fixed at 1

µs

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