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HD6417618A 数据表(PDF) 638 Page - Renesas Technology Corp

部件名 HD6417618A
功能描述  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD6417618A 数据表(HTML) 638 Page - Renesas Technology Corp

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Rev. 6.00 Jun. 12, 2007 Page 606 of 610
REJ09B0131-0600
H
Host interface (HIF)................................ 391
H-UDI Interrupt...................................... 506
H-UDI Reset........................................... 506
I
I/O ports.................................................. 457
Illegal slot instructions.............................. 75
Immediate data formats ............................ 25
Initial values of registers........................... 23
Instruction formats.................................... 31
Instruction set ........................................... 35
Interrupt controller (INTC)....................... 81
Interrupt exception handling..................... 73
Interrupt exception handling
vector table ............................................... 98
Interrupt priority ....................................... 73
Interrupt response time ........................... 102
Interrupt sequence................................... 100
Interrupt sources ....................................... 72
IRQ7 to IRQ0 Interrupts........................... 96
L
Logic operation instructions ..................... 43
M
Magic Packet detection........................... 255
Memory data formats................................ 24
Memory-mapped cache ............................ 58
MII frame timing .................................... 250
Module standby mode ............................ 225
Multi-buffer frame transmit/receive
processing............................................... 295
multiplexed pin....................................... 423
N
NMI interrupt............................................ 95
Normal space interface ........................... 146
O
On-chip peripheral module interrupts ....... 97
Operation by IPG setting ........................ 256
P
PCMCIA interface .................................. 183
Pin assignments........................................... 7
Pin function controller (PFC).................. 423
Pin functions ............................................... 8
Power-down modes................................. 215
Power-on reset .......................................... 69
Power-on sequence ................................. 177
R
Read access............................................... 56
Receive descriptor 0 (RD0) .................... 288
Receive descriptor 1 (RD1) .................... 291
Receive descriptor 2 (RD2) .................... 291
Receiving serial data
(asynchronous mode).............................. 371
Receiving serial data
(synchronous mode)................................ 380
Refreshing............................................... 174
Register
APR............................. 245, 515, 530, 538
BAMRA...................... 474, 515, 532, 538
BAMRB...................... 476, 515, 531, 538
BARA ......................... 473, 515, 532, 538
BARB ......................... 475, 515, 531, 538
BBRA ......................... 474, 515, 532, 538
BBRB.......................... 477, 515, 532, 538
BDMRB...................... 477, 515, 531, 538
BDRB ......................... 476, 515, 531, 538
BETR .......................... 482, 515, 531, 538
BRCR.......................... 479, 515, 531, 538



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