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R5F3650MDFB 数据表(PDF) 101 Page - Renesas Technology Corp |
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R5F3650MDFB 数据表(HTML) 101 Page - Renesas Technology Corp |
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101 / 829 page ![]() REJ09B0484-0030 Rev.0.30 Sep 09, 2008 Page 66 of 791 Under development Preliminary Specification This is a preliminary specification and is subject to change. M16C/65 Group 6. Resets Figure 6.2 CPU Register Status after Reset b15 b0 Data register (R0) Address register (A0) Frame base register (FB) Program counter (PC) Interrupt table register (INTB) User stack pointer (USP) Interrupt stack pointer (ISP) Static base register (SB) Flag register (FLG) 0000h 0000h 0000h C D Z S B O I U IPL 0000h 0000h 0000h 0000h 0000h b19 b0 Content of addresses FFFFEh to FFFFCh b15 b0 b15 b0 b15 b0 b7 b8 00000h Data register (R1) Data register (R2) Data register (R3) Address register (A1) 0000h 0000h 0000h |
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