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R5F3650MDFB 数据表(PDF) 97 Page - Renesas Technology Corp |
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R5F3650MDFB 数据表(HTML) 97 Page - Renesas Technology Corp |
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97 / 829 page ![]() REJ09B0484-0030 Rev.0.30 Sep 09, 2008 Page 62 of 791 Under development Preliminary Specification This is a preliminary specification and is subject to change. M16C/65 Group 6. Resets CWR (Cold Start-Up/Warm Start-Up Discrimination Flag) (b0) Condition to become 0: • Power-on • Power-on reset, voltage monitor 0 reset Condition to become 1: • Writing 1 to the CWR bit OSDR (Oscillation Stop Detection Reset Detection Flag) (b6) This bit becomes 0 by writing a 0 by a program. Writing a 1 has no effect. |
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