H8SXSLASH1663 datasheet(729/1158 Pages) RENESAS

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Section 15 Serial Communication Interface (SCI, IrDA, CRC)

Rev.1.00 Jun. 07, 2006 Page 677 of 1102

REJ09B0294-0100

Bit

Bit Name

Initial

Value

R/W

Description

ORER

R/(W)* Overrun Error

Indicates that an overrun error has occurred during

reception and the reception ends abnormally.

[Setting condition]

• When the next serial reception is completed while

RDRF = 1

In RDR, the receive data prior to an overrun error

occurrence is retained, but data received following the

overrun error occurrence is lost. When the ORER flag

is set to 1, subsequent serial reception cannot be

performed. Note that, in clocked synchronous mode,

serial transmission also cannot continue.

[Clearing condition]

• When 0 is written to ORER after reading ORER = 1

(When the CPU is used to clear this flag by writing 0

while the corresponding interrupt is enabled, be sure

to read the flag after writing 0 to it.)

Even when the RE bit in SCR is cleared, the ORER

flag is not affected and retains its previous value.

ERS

R/(W)* Error Signal Status

[Setting condition]

• When a low error signal is sampled

[Clearing condition]

• When 0 is written to ERS after reading ERS = 1

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